162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * GPIO driver for the SMSC SCH311x Super-I/O chips 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2013 Bruno Randolf <br1@einfach.org> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * SuperIO functions and chip detection: 862306a36Sopenharmony_ci * (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/ioport.h> 1262306a36Sopenharmony_ci#include <linux/module.h> 1362306a36Sopenharmony_ci#include <linux/kernel.h> 1462306a36Sopenharmony_ci#include <linux/init.h> 1562306a36Sopenharmony_ci#include <linux/platform_device.h> 1662306a36Sopenharmony_ci#include <linux/gpio/driver.h> 1762306a36Sopenharmony_ci#include <linux/bitops.h> 1862306a36Sopenharmony_ci#include <linux/io.h> 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci#define DRV_NAME "gpio-sch311x" 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#define SCH311X_GPIO_CONF_DIR BIT(0) 2362306a36Sopenharmony_ci#define SCH311X_GPIO_CONF_INVERT BIT(1) 2462306a36Sopenharmony_ci#define SCH311X_GPIO_CONF_OPEN_DRAIN BIT(7) 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#define SIO_CONFIG_KEY_ENTER 0x55 2762306a36Sopenharmony_ci#define SIO_CONFIG_KEY_EXIT 0xaa 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define GP1 0x4b 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_cistatic int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e }; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic struct platform_device *sch311x_gpio_pdev; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_cistruct sch311x_pdev_data { /* platform device data */ 3662306a36Sopenharmony_ci unsigned short runtime_reg; /* runtime register base address */ 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistruct sch311x_gpio_block { /* one GPIO block runtime data */ 4062306a36Sopenharmony_ci struct gpio_chip chip; 4162306a36Sopenharmony_ci unsigned short data_reg; /* from definition below */ 4262306a36Sopenharmony_ci unsigned short *config_regs; /* pointer to definition below */ 4362306a36Sopenharmony_ci unsigned short runtime_reg; /* runtime register */ 4462306a36Sopenharmony_ci spinlock_t lock; /* lock for this GPIO block */ 4562306a36Sopenharmony_ci}; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cistruct sch311x_gpio_priv { /* driver private data */ 4862306a36Sopenharmony_ci struct sch311x_gpio_block blocks[6]; 4962306a36Sopenharmony_ci}; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistruct sch311x_gpio_block_def { /* register address definitions */ 5262306a36Sopenharmony_ci unsigned short data_reg; 5362306a36Sopenharmony_ci unsigned short config_regs[8]; 5462306a36Sopenharmony_ci unsigned short base; 5562306a36Sopenharmony_ci}; 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci/* Note: some GPIOs are not available, these are marked with 0x00 */ 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_cistatic struct sch311x_gpio_block_def sch311x_gpio_blocks[] = { 6062306a36Sopenharmony_ci { 6162306a36Sopenharmony_ci .data_reg = 0x4b, /* GP1 */ 6262306a36Sopenharmony_ci .config_regs = {0x23, 0x24, 0x25, 0x26, 0x27, 0x29, 0x2a, 0x2b}, 6362306a36Sopenharmony_ci .base = 10, 6462306a36Sopenharmony_ci }, 6562306a36Sopenharmony_ci { 6662306a36Sopenharmony_ci .data_reg = 0x4c, /* GP2 */ 6762306a36Sopenharmony_ci .config_regs = {0x00, 0x2c, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x32}, 6862306a36Sopenharmony_ci .base = 20, 6962306a36Sopenharmony_ci }, 7062306a36Sopenharmony_ci { 7162306a36Sopenharmony_ci .data_reg = 0x4d, /* GP3 */ 7262306a36Sopenharmony_ci .config_regs = {0x33, 0x34, 0x35, 0x36, 0x37, 0x00, 0x39, 0x3a}, 7362306a36Sopenharmony_ci .base = 30, 7462306a36Sopenharmony_ci }, 7562306a36Sopenharmony_ci { 7662306a36Sopenharmony_ci .data_reg = 0x4e, /* GP4 */ 7762306a36Sopenharmony_ci .config_regs = {0x3b, 0x00, 0x3d, 0x00, 0x6e, 0x6f, 0x72, 0x73}, 7862306a36Sopenharmony_ci .base = 40, 7962306a36Sopenharmony_ci }, 8062306a36Sopenharmony_ci { 8162306a36Sopenharmony_ci .data_reg = 0x4f, /* GP5 */ 8262306a36Sopenharmony_ci .config_regs = {0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46}, 8362306a36Sopenharmony_ci .base = 50, 8462306a36Sopenharmony_ci }, 8562306a36Sopenharmony_ci { 8662306a36Sopenharmony_ci .data_reg = 0x50, /* GP6 */ 8762306a36Sopenharmony_ci .config_regs = {0x47, 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59}, 8862306a36Sopenharmony_ci .base = 60, 8962306a36Sopenharmony_ci }, 9062306a36Sopenharmony_ci}; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci/* 9362306a36Sopenharmony_ci * Super-IO functions 9462306a36Sopenharmony_ci */ 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_cistatic inline int sch311x_sio_enter(int sio_config_port) 9762306a36Sopenharmony_ci{ 9862306a36Sopenharmony_ci /* Don't step on other drivers' I/O space by accident. */ 9962306a36Sopenharmony_ci if (!request_muxed_region(sio_config_port, 2, DRV_NAME)) { 10062306a36Sopenharmony_ci pr_err(DRV_NAME "I/O address 0x%04x already in use\n", 10162306a36Sopenharmony_ci sio_config_port); 10262306a36Sopenharmony_ci return -EBUSY; 10362306a36Sopenharmony_ci } 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci outb(SIO_CONFIG_KEY_ENTER, sio_config_port); 10662306a36Sopenharmony_ci return 0; 10762306a36Sopenharmony_ci} 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_cistatic inline void sch311x_sio_exit(int sio_config_port) 11062306a36Sopenharmony_ci{ 11162306a36Sopenharmony_ci outb(SIO_CONFIG_KEY_EXIT, sio_config_port); 11262306a36Sopenharmony_ci release_region(sio_config_port, 2); 11362306a36Sopenharmony_ci} 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_cistatic inline int sch311x_sio_inb(int sio_config_port, int reg) 11662306a36Sopenharmony_ci{ 11762306a36Sopenharmony_ci outb(reg, sio_config_port); 11862306a36Sopenharmony_ci return inb(sio_config_port + 1); 11962306a36Sopenharmony_ci} 12062306a36Sopenharmony_ci 12162306a36Sopenharmony_cistatic inline void sch311x_sio_outb(int sio_config_port, int reg, int val) 12262306a36Sopenharmony_ci{ 12362306a36Sopenharmony_ci outb(reg, sio_config_port); 12462306a36Sopenharmony_ci outb(val, sio_config_port + 1); 12562306a36Sopenharmony_ci} 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci/* 12962306a36Sopenharmony_ci * GPIO functions 13062306a36Sopenharmony_ci */ 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_cistatic int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) 13362306a36Sopenharmony_ci{ 13462306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci if (block->config_regs[offset] == 0) /* GPIO is not available */ 13762306a36Sopenharmony_ci return -ENODEV; 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci if (!request_region(block->runtime_reg + block->config_regs[offset], 14062306a36Sopenharmony_ci 1, DRV_NAME)) { 14162306a36Sopenharmony_ci dev_err(chip->parent, "Failed to request region 0x%04x.\n", 14262306a36Sopenharmony_ci block->runtime_reg + block->config_regs[offset]); 14362306a36Sopenharmony_ci return -EBUSY; 14462306a36Sopenharmony_ci } 14562306a36Sopenharmony_ci return 0; 14662306a36Sopenharmony_ci} 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_cistatic void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset) 14962306a36Sopenharmony_ci{ 15062306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_ci if (block->config_regs[offset] == 0) /* GPIO is not available */ 15362306a36Sopenharmony_ci return; 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci release_region(block->runtime_reg + block->config_regs[offset], 1); 15662306a36Sopenharmony_ci} 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_cistatic int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset) 15962306a36Sopenharmony_ci{ 16062306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 16162306a36Sopenharmony_ci u8 data; 16262306a36Sopenharmony_ci 16362306a36Sopenharmony_ci spin_lock(&block->lock); 16462306a36Sopenharmony_ci data = inb(block->runtime_reg + block->data_reg); 16562306a36Sopenharmony_ci spin_unlock(&block->lock); 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci return !!(data & BIT(offset)); 16862306a36Sopenharmony_ci} 16962306a36Sopenharmony_ci 17062306a36Sopenharmony_cistatic void __sch311x_gpio_set(struct sch311x_gpio_block *block, 17162306a36Sopenharmony_ci unsigned offset, int value) 17262306a36Sopenharmony_ci{ 17362306a36Sopenharmony_ci u8 data = inb(block->runtime_reg + block->data_reg); 17462306a36Sopenharmony_ci if (value) 17562306a36Sopenharmony_ci data |= BIT(offset); 17662306a36Sopenharmony_ci else 17762306a36Sopenharmony_ci data &= ~BIT(offset); 17862306a36Sopenharmony_ci outb(data, block->runtime_reg + block->data_reg); 17962306a36Sopenharmony_ci} 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_cistatic void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, 18262306a36Sopenharmony_ci int value) 18362306a36Sopenharmony_ci{ 18462306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ci spin_lock(&block->lock); 18762306a36Sopenharmony_ci __sch311x_gpio_set(block, offset, value); 18862306a36Sopenharmony_ci spin_unlock(&block->lock); 18962306a36Sopenharmony_ci} 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_cistatic int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 19262306a36Sopenharmony_ci{ 19362306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 19462306a36Sopenharmony_ci u8 data; 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci spin_lock(&block->lock); 19762306a36Sopenharmony_ci data = inb(block->runtime_reg + block->config_regs[offset]); 19862306a36Sopenharmony_ci data |= SCH311X_GPIO_CONF_DIR; 19962306a36Sopenharmony_ci outb(data, block->runtime_reg + block->config_regs[offset]); 20062306a36Sopenharmony_ci spin_unlock(&block->lock); 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ci return 0; 20362306a36Sopenharmony_ci} 20462306a36Sopenharmony_ci 20562306a36Sopenharmony_cistatic int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, 20662306a36Sopenharmony_ci int value) 20762306a36Sopenharmony_ci{ 20862306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 20962306a36Sopenharmony_ci u8 data; 21062306a36Sopenharmony_ci 21162306a36Sopenharmony_ci spin_lock(&block->lock); 21262306a36Sopenharmony_ci 21362306a36Sopenharmony_ci data = inb(block->runtime_reg + block->config_regs[offset]); 21462306a36Sopenharmony_ci data &= ~SCH311X_GPIO_CONF_DIR; 21562306a36Sopenharmony_ci outb(data, block->runtime_reg + block->config_regs[offset]); 21662306a36Sopenharmony_ci __sch311x_gpio_set(block, offset, value); 21762306a36Sopenharmony_ci 21862306a36Sopenharmony_ci spin_unlock(&block->lock); 21962306a36Sopenharmony_ci return 0; 22062306a36Sopenharmony_ci} 22162306a36Sopenharmony_ci 22262306a36Sopenharmony_cistatic int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) 22362306a36Sopenharmony_ci{ 22462306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 22562306a36Sopenharmony_ci u8 data; 22662306a36Sopenharmony_ci 22762306a36Sopenharmony_ci spin_lock(&block->lock); 22862306a36Sopenharmony_ci data = inb(block->runtime_reg + block->config_regs[offset]); 22962306a36Sopenharmony_ci spin_unlock(&block->lock); 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci if (data & SCH311X_GPIO_CONF_DIR) 23262306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_IN; 23362306a36Sopenharmony_ci 23462306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_OUT; 23562306a36Sopenharmony_ci} 23662306a36Sopenharmony_ci 23762306a36Sopenharmony_cistatic int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset, 23862306a36Sopenharmony_ci unsigned long config) 23962306a36Sopenharmony_ci{ 24062306a36Sopenharmony_ci struct sch311x_gpio_block *block = gpiochip_get_data(chip); 24162306a36Sopenharmony_ci enum pin_config_param param = pinconf_to_config_param(config); 24262306a36Sopenharmony_ci u8 data; 24362306a36Sopenharmony_ci 24462306a36Sopenharmony_ci switch (param) { 24562306a36Sopenharmony_ci case PIN_CONFIG_DRIVE_OPEN_DRAIN: 24662306a36Sopenharmony_ci spin_lock(&block->lock); 24762306a36Sopenharmony_ci data = inb(block->runtime_reg + block->config_regs[offset]); 24862306a36Sopenharmony_ci data |= SCH311X_GPIO_CONF_OPEN_DRAIN; 24962306a36Sopenharmony_ci outb(data, block->runtime_reg + block->config_regs[offset]); 25062306a36Sopenharmony_ci spin_unlock(&block->lock); 25162306a36Sopenharmony_ci return 0; 25262306a36Sopenharmony_ci case PIN_CONFIG_DRIVE_PUSH_PULL: 25362306a36Sopenharmony_ci spin_lock(&block->lock); 25462306a36Sopenharmony_ci data = inb(block->runtime_reg + block->config_regs[offset]); 25562306a36Sopenharmony_ci data &= ~SCH311X_GPIO_CONF_OPEN_DRAIN; 25662306a36Sopenharmony_ci outb(data, block->runtime_reg + block->config_regs[offset]); 25762306a36Sopenharmony_ci spin_unlock(&block->lock); 25862306a36Sopenharmony_ci return 0; 25962306a36Sopenharmony_ci default: 26062306a36Sopenharmony_ci break; 26162306a36Sopenharmony_ci } 26262306a36Sopenharmony_ci return -ENOTSUPP; 26362306a36Sopenharmony_ci} 26462306a36Sopenharmony_ci 26562306a36Sopenharmony_cistatic int sch311x_gpio_probe(struct platform_device *pdev) 26662306a36Sopenharmony_ci{ 26762306a36Sopenharmony_ci struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev); 26862306a36Sopenharmony_ci struct sch311x_gpio_priv *priv; 26962306a36Sopenharmony_ci struct sch311x_gpio_block *block; 27062306a36Sopenharmony_ci int err, i; 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_ci /* we can register all GPIO data registers at once */ 27362306a36Sopenharmony_ci if (!devm_request_region(&pdev->dev, pdata->runtime_reg + GP1, 6, 27462306a36Sopenharmony_ci DRV_NAME)) { 27562306a36Sopenharmony_ci dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n", 27662306a36Sopenharmony_ci pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5); 27762306a36Sopenharmony_ci return -EBUSY; 27862306a36Sopenharmony_ci } 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_ci priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 28162306a36Sopenharmony_ci if (!priv) 28262306a36Sopenharmony_ci return -ENOMEM; 28362306a36Sopenharmony_ci 28462306a36Sopenharmony_ci for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) { 28562306a36Sopenharmony_ci block = &priv->blocks[i]; 28662306a36Sopenharmony_ci 28762306a36Sopenharmony_ci spin_lock_init(&block->lock); 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_ci block->chip.label = DRV_NAME; 29062306a36Sopenharmony_ci block->chip.owner = THIS_MODULE; 29162306a36Sopenharmony_ci block->chip.request = sch311x_gpio_request; 29262306a36Sopenharmony_ci block->chip.free = sch311x_gpio_free; 29362306a36Sopenharmony_ci block->chip.direction_input = sch311x_gpio_direction_in; 29462306a36Sopenharmony_ci block->chip.direction_output = sch311x_gpio_direction_out; 29562306a36Sopenharmony_ci block->chip.get_direction = sch311x_gpio_get_direction; 29662306a36Sopenharmony_ci block->chip.set_config = sch311x_gpio_set_config; 29762306a36Sopenharmony_ci block->chip.get = sch311x_gpio_get; 29862306a36Sopenharmony_ci block->chip.set = sch311x_gpio_set; 29962306a36Sopenharmony_ci block->chip.ngpio = 8; 30062306a36Sopenharmony_ci block->chip.parent = &pdev->dev; 30162306a36Sopenharmony_ci block->chip.base = sch311x_gpio_blocks[i].base; 30262306a36Sopenharmony_ci block->config_regs = sch311x_gpio_blocks[i].config_regs; 30362306a36Sopenharmony_ci block->data_reg = sch311x_gpio_blocks[i].data_reg; 30462306a36Sopenharmony_ci block->runtime_reg = pdata->runtime_reg; 30562306a36Sopenharmony_ci 30662306a36Sopenharmony_ci err = devm_gpiochip_add_data(&pdev->dev, &block->chip, block); 30762306a36Sopenharmony_ci if (err < 0) { 30862306a36Sopenharmony_ci dev_err(&pdev->dev, 30962306a36Sopenharmony_ci "Could not register gpiochip, %d\n", err); 31062306a36Sopenharmony_ci return err; 31162306a36Sopenharmony_ci } 31262306a36Sopenharmony_ci dev_info(&pdev->dev, 31362306a36Sopenharmony_ci "SMSC SCH311x GPIO block %d registered.\n", i); 31462306a36Sopenharmony_ci } 31562306a36Sopenharmony_ci 31662306a36Sopenharmony_ci return 0; 31762306a36Sopenharmony_ci} 31862306a36Sopenharmony_ci 31962306a36Sopenharmony_cistatic struct platform_driver sch311x_gpio_driver = { 32062306a36Sopenharmony_ci .driver.name = DRV_NAME, 32162306a36Sopenharmony_ci .probe = sch311x_gpio_probe, 32262306a36Sopenharmony_ci}; 32362306a36Sopenharmony_ci 32462306a36Sopenharmony_ci 32562306a36Sopenharmony_ci/* 32662306a36Sopenharmony_ci * Init & exit routines 32762306a36Sopenharmony_ci */ 32862306a36Sopenharmony_ci 32962306a36Sopenharmony_cistatic int __init sch311x_detect(int sio_config_port, unsigned short *addr) 33062306a36Sopenharmony_ci{ 33162306a36Sopenharmony_ci int err = 0, reg; 33262306a36Sopenharmony_ci unsigned short base_addr; 33362306a36Sopenharmony_ci u8 dev_id; 33462306a36Sopenharmony_ci 33562306a36Sopenharmony_ci err = sch311x_sio_enter(sio_config_port); 33662306a36Sopenharmony_ci if (err) 33762306a36Sopenharmony_ci return err; 33862306a36Sopenharmony_ci 33962306a36Sopenharmony_ci /* Check device ID. */ 34062306a36Sopenharmony_ci reg = sch311x_sio_inb(sio_config_port, 0x20); 34162306a36Sopenharmony_ci switch (reg) { 34262306a36Sopenharmony_ci case 0x7c: /* SCH3112 */ 34362306a36Sopenharmony_ci dev_id = 2; 34462306a36Sopenharmony_ci break; 34562306a36Sopenharmony_ci case 0x7d: /* SCH3114 */ 34662306a36Sopenharmony_ci dev_id = 4; 34762306a36Sopenharmony_ci break; 34862306a36Sopenharmony_ci case 0x7f: /* SCH3116 */ 34962306a36Sopenharmony_ci dev_id = 6; 35062306a36Sopenharmony_ci break; 35162306a36Sopenharmony_ci default: 35262306a36Sopenharmony_ci err = -ENODEV; 35362306a36Sopenharmony_ci goto exit; 35462306a36Sopenharmony_ci } 35562306a36Sopenharmony_ci 35662306a36Sopenharmony_ci /* Select logical device A (runtime registers) */ 35762306a36Sopenharmony_ci sch311x_sio_outb(sio_config_port, 0x07, 0x0a); 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_ci /* Check if Logical Device Register is currently active */ 36062306a36Sopenharmony_ci if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0) 36162306a36Sopenharmony_ci pr_info("Seems that LDN 0x0a is not active...\n"); 36262306a36Sopenharmony_ci 36362306a36Sopenharmony_ci /* Get the base address of the runtime registers */ 36462306a36Sopenharmony_ci base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) | 36562306a36Sopenharmony_ci sch311x_sio_inb(sio_config_port, 0x61); 36662306a36Sopenharmony_ci if (!base_addr) { 36762306a36Sopenharmony_ci pr_err("Base address not set\n"); 36862306a36Sopenharmony_ci err = -ENODEV; 36962306a36Sopenharmony_ci goto exit; 37062306a36Sopenharmony_ci } 37162306a36Sopenharmony_ci *addr = base_addr; 37262306a36Sopenharmony_ci 37362306a36Sopenharmony_ci pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr); 37462306a36Sopenharmony_ci 37562306a36Sopenharmony_ciexit: 37662306a36Sopenharmony_ci sch311x_sio_exit(sio_config_port); 37762306a36Sopenharmony_ci return err; 37862306a36Sopenharmony_ci} 37962306a36Sopenharmony_ci 38062306a36Sopenharmony_cistatic int __init sch311x_gpio_pdev_add(const unsigned short addr) 38162306a36Sopenharmony_ci{ 38262306a36Sopenharmony_ci struct sch311x_pdev_data pdata; 38362306a36Sopenharmony_ci int err; 38462306a36Sopenharmony_ci 38562306a36Sopenharmony_ci pdata.runtime_reg = addr; 38662306a36Sopenharmony_ci 38762306a36Sopenharmony_ci sch311x_gpio_pdev = platform_device_alloc(DRV_NAME, -1); 38862306a36Sopenharmony_ci if (!sch311x_gpio_pdev) 38962306a36Sopenharmony_ci return -ENOMEM; 39062306a36Sopenharmony_ci 39162306a36Sopenharmony_ci err = platform_device_add_data(sch311x_gpio_pdev, 39262306a36Sopenharmony_ci &pdata, sizeof(pdata)); 39362306a36Sopenharmony_ci if (err) { 39462306a36Sopenharmony_ci pr_err(DRV_NAME "Platform data allocation failed\n"); 39562306a36Sopenharmony_ci goto err; 39662306a36Sopenharmony_ci } 39762306a36Sopenharmony_ci 39862306a36Sopenharmony_ci err = platform_device_add(sch311x_gpio_pdev); 39962306a36Sopenharmony_ci if (err) { 40062306a36Sopenharmony_ci pr_err(DRV_NAME "Device addition failed\n"); 40162306a36Sopenharmony_ci goto err; 40262306a36Sopenharmony_ci } 40362306a36Sopenharmony_ci return 0; 40462306a36Sopenharmony_ci 40562306a36Sopenharmony_cierr: 40662306a36Sopenharmony_ci platform_device_put(sch311x_gpio_pdev); 40762306a36Sopenharmony_ci return err; 40862306a36Sopenharmony_ci} 40962306a36Sopenharmony_ci 41062306a36Sopenharmony_cistatic int __init sch311x_gpio_init(void) 41162306a36Sopenharmony_ci{ 41262306a36Sopenharmony_ci int err, i; 41362306a36Sopenharmony_ci unsigned short addr = 0; 41462306a36Sopenharmony_ci 41562306a36Sopenharmony_ci for (i = 0; i < ARRAY_SIZE(sch311x_ioports); i++) 41662306a36Sopenharmony_ci if (sch311x_detect(sch311x_ioports[i], &addr) == 0) 41762306a36Sopenharmony_ci break; 41862306a36Sopenharmony_ci 41962306a36Sopenharmony_ci if (!addr) 42062306a36Sopenharmony_ci return -ENODEV; 42162306a36Sopenharmony_ci 42262306a36Sopenharmony_ci err = platform_driver_register(&sch311x_gpio_driver); 42362306a36Sopenharmony_ci if (err) 42462306a36Sopenharmony_ci return err; 42562306a36Sopenharmony_ci 42662306a36Sopenharmony_ci err = sch311x_gpio_pdev_add(addr); 42762306a36Sopenharmony_ci if (err) 42862306a36Sopenharmony_ci goto unreg_platform_driver; 42962306a36Sopenharmony_ci 43062306a36Sopenharmony_ci return 0; 43162306a36Sopenharmony_ci 43262306a36Sopenharmony_ciunreg_platform_driver: 43362306a36Sopenharmony_ci platform_driver_unregister(&sch311x_gpio_driver); 43462306a36Sopenharmony_ci return err; 43562306a36Sopenharmony_ci} 43662306a36Sopenharmony_ci 43762306a36Sopenharmony_cistatic void __exit sch311x_gpio_exit(void) 43862306a36Sopenharmony_ci{ 43962306a36Sopenharmony_ci platform_device_unregister(sch311x_gpio_pdev); 44062306a36Sopenharmony_ci platform_driver_unregister(&sch311x_gpio_driver); 44162306a36Sopenharmony_ci} 44262306a36Sopenharmony_ci 44362306a36Sopenharmony_cimodule_init(sch311x_gpio_init); 44462306a36Sopenharmony_cimodule_exit(sch311x_gpio_exit); 44562306a36Sopenharmony_ci 44662306a36Sopenharmony_ciMODULE_AUTHOR("Bruno Randolf <br1@einfach.org>"); 44762306a36Sopenharmony_ciMODULE_DESCRIPTION("SMSC SCH311x GPIO Driver"); 44862306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 44962306a36Sopenharmony_ciMODULE_ALIAS("platform:gpio-sch311x"); 450