162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/ 462306a36Sopenharmony_ci * Andrew Davis <afd@ti.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#include <linux/bitmap.h> 862306a36Sopenharmony_ci#include <linux/bitops.h> 962306a36Sopenharmony_ci#include <linux/delay.h> 1062306a36Sopenharmony_ci#include <linux/gpio/consumer.h> 1162306a36Sopenharmony_ci#include <linux/gpio/driver.h> 1262306a36Sopenharmony_ci#include <linux/module.h> 1362306a36Sopenharmony_ci#include <linux/mutex.h> 1462306a36Sopenharmony_ci#include <linux/spi/spi.h> 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#define DEFAULT_NGPIO 8 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/** 1962306a36Sopenharmony_ci * struct pisosr_gpio - GPIO driver data 2062306a36Sopenharmony_ci * @chip: GPIO controller chip 2162306a36Sopenharmony_ci * @spi: SPI device pointer 2262306a36Sopenharmony_ci * @buffer: Buffer for device reads 2362306a36Sopenharmony_ci * @buffer_size: Size of buffer 2462306a36Sopenharmony_ci * @load_gpio: GPIO pin used to load input into device 2562306a36Sopenharmony_ci * @lock: Protects read sequences 2662306a36Sopenharmony_ci */ 2762306a36Sopenharmony_cistruct pisosr_gpio { 2862306a36Sopenharmony_ci struct gpio_chip chip; 2962306a36Sopenharmony_ci struct spi_device *spi; 3062306a36Sopenharmony_ci u8 *buffer; 3162306a36Sopenharmony_ci size_t buffer_size; 3262306a36Sopenharmony_ci struct gpio_desc *load_gpio; 3362306a36Sopenharmony_ci struct mutex lock; 3462306a36Sopenharmony_ci}; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_cistatic int pisosr_gpio_refresh(struct pisosr_gpio *gpio) 3762306a36Sopenharmony_ci{ 3862306a36Sopenharmony_ci int ret; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci mutex_lock(&gpio->lock); 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci if (gpio->load_gpio) { 4362306a36Sopenharmony_ci gpiod_set_value_cansleep(gpio->load_gpio, 1); 4462306a36Sopenharmony_ci udelay(1); /* registers load time (~10ns) */ 4562306a36Sopenharmony_ci gpiod_set_value_cansleep(gpio->load_gpio, 0); 4662306a36Sopenharmony_ci udelay(1); /* registers recovery time (~5ns) */ 4762306a36Sopenharmony_ci } 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size); 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci mutex_unlock(&gpio->lock); 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci return ret; 5462306a36Sopenharmony_ci} 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_cistatic int pisosr_gpio_get_direction(struct gpio_chip *chip, 5762306a36Sopenharmony_ci unsigned offset) 5862306a36Sopenharmony_ci{ 5962306a36Sopenharmony_ci /* This device always input */ 6062306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_IN; 6162306a36Sopenharmony_ci} 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_cistatic int pisosr_gpio_direction_input(struct gpio_chip *chip, 6462306a36Sopenharmony_ci unsigned offset) 6562306a36Sopenharmony_ci{ 6662306a36Sopenharmony_ci /* This device always input */ 6762306a36Sopenharmony_ci return 0; 6862306a36Sopenharmony_ci} 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_cistatic int pisosr_gpio_direction_output(struct gpio_chip *chip, 7162306a36Sopenharmony_ci unsigned offset, int value) 7262306a36Sopenharmony_ci{ 7362306a36Sopenharmony_ci /* This device is input only */ 7462306a36Sopenharmony_ci return -EINVAL; 7562306a36Sopenharmony_ci} 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_cistatic int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset) 7862306a36Sopenharmony_ci{ 7962306a36Sopenharmony_ci struct pisosr_gpio *gpio = gpiochip_get_data(chip); 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci /* Refresh may not always be needed */ 8262306a36Sopenharmony_ci pisosr_gpio_refresh(gpio); 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1; 8562306a36Sopenharmony_ci} 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cistatic int pisosr_gpio_get_multiple(struct gpio_chip *chip, 8862306a36Sopenharmony_ci unsigned long *mask, unsigned long *bits) 8962306a36Sopenharmony_ci{ 9062306a36Sopenharmony_ci struct pisosr_gpio *gpio = gpiochip_get_data(chip); 9162306a36Sopenharmony_ci unsigned long offset; 9262306a36Sopenharmony_ci unsigned long gpio_mask; 9362306a36Sopenharmony_ci unsigned long buffer_state; 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci pisosr_gpio_refresh(gpio); 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci bitmap_zero(bits, chip->ngpio); 9862306a36Sopenharmony_ci for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { 9962306a36Sopenharmony_ci buffer_state = gpio->buffer[offset / 8] & gpio_mask; 10062306a36Sopenharmony_ci bitmap_set_value8(bits, buffer_state, offset); 10162306a36Sopenharmony_ci } 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci return 0; 10462306a36Sopenharmony_ci} 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_cistatic const struct gpio_chip template_chip = { 10762306a36Sopenharmony_ci .label = "pisosr-gpio", 10862306a36Sopenharmony_ci .owner = THIS_MODULE, 10962306a36Sopenharmony_ci .get_direction = pisosr_gpio_get_direction, 11062306a36Sopenharmony_ci .direction_input = pisosr_gpio_direction_input, 11162306a36Sopenharmony_ci .direction_output = pisosr_gpio_direction_output, 11262306a36Sopenharmony_ci .get = pisosr_gpio_get, 11362306a36Sopenharmony_ci .get_multiple = pisosr_gpio_get_multiple, 11462306a36Sopenharmony_ci .base = -1, 11562306a36Sopenharmony_ci .ngpio = DEFAULT_NGPIO, 11662306a36Sopenharmony_ci .can_sleep = true, 11762306a36Sopenharmony_ci}; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_cistatic void pisosr_mutex_destroy(void *lock) 12062306a36Sopenharmony_ci{ 12162306a36Sopenharmony_ci mutex_destroy(lock); 12262306a36Sopenharmony_ci} 12362306a36Sopenharmony_ci 12462306a36Sopenharmony_cistatic int pisosr_gpio_probe(struct spi_device *spi) 12562306a36Sopenharmony_ci{ 12662306a36Sopenharmony_ci struct device *dev = &spi->dev; 12762306a36Sopenharmony_ci struct pisosr_gpio *gpio; 12862306a36Sopenharmony_ci int ret; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL); 13162306a36Sopenharmony_ci if (!gpio) 13262306a36Sopenharmony_ci return -ENOMEM; 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_ci gpio->chip = template_chip; 13562306a36Sopenharmony_ci gpio->chip.parent = dev; 13662306a36Sopenharmony_ci of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio); 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_ci gpio->spi = spi; 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8); 14162306a36Sopenharmony_ci gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL); 14262306a36Sopenharmony_ci if (!gpio->buffer) 14362306a36Sopenharmony_ci return -ENOMEM; 14462306a36Sopenharmony_ci 14562306a36Sopenharmony_ci gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW); 14662306a36Sopenharmony_ci if (IS_ERR(gpio->load_gpio)) 14762306a36Sopenharmony_ci return dev_err_probe(dev, PTR_ERR(gpio->load_gpio), 14862306a36Sopenharmony_ci "Unable to allocate load GPIO\n"); 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_ci mutex_init(&gpio->lock); 15162306a36Sopenharmony_ci ret = devm_add_action_or_reset(dev, pisosr_mutex_destroy, &gpio->lock); 15262306a36Sopenharmony_ci if (ret) 15362306a36Sopenharmony_ci return ret; 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci ret = devm_gpiochip_add_data(dev, &gpio->chip, gpio); 15662306a36Sopenharmony_ci if (ret < 0) { 15762306a36Sopenharmony_ci dev_err(dev, "Unable to register gpiochip\n"); 15862306a36Sopenharmony_ci return ret; 15962306a36Sopenharmony_ci } 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ci return 0; 16262306a36Sopenharmony_ci} 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_cistatic const struct spi_device_id pisosr_gpio_id_table[] = { 16562306a36Sopenharmony_ci { "pisosr-gpio", }, 16662306a36Sopenharmony_ci { /* sentinel */ } 16762306a36Sopenharmony_ci}; 16862306a36Sopenharmony_ciMODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table); 16962306a36Sopenharmony_ci 17062306a36Sopenharmony_cistatic const struct of_device_id pisosr_gpio_of_match_table[] = { 17162306a36Sopenharmony_ci { .compatible = "pisosr-gpio", }, 17262306a36Sopenharmony_ci { /* sentinel */ } 17362306a36Sopenharmony_ci}; 17462306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table); 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_cistatic struct spi_driver pisosr_gpio_driver = { 17762306a36Sopenharmony_ci .driver = { 17862306a36Sopenharmony_ci .name = "pisosr-gpio", 17962306a36Sopenharmony_ci .of_match_table = pisosr_gpio_of_match_table, 18062306a36Sopenharmony_ci }, 18162306a36Sopenharmony_ci .probe = pisosr_gpio_probe, 18262306a36Sopenharmony_ci .id_table = pisosr_gpio_id_table, 18362306a36Sopenharmony_ci}; 18462306a36Sopenharmony_cimodule_spi_driver(pisosr_gpio_driver); 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ciMODULE_AUTHOR("Andrew Davis <afd@ti.com>"); 18762306a36Sopenharmony_ciMODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver"); 18862306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 189