162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * MC33880 high-side/low-side switch GPIO driver 462306a36Sopenharmony_ci * Copyright (c) 2009 Intel Corporation 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci/* Supports: 862306a36Sopenharmony_ci * Freescale MC33880 high-side/low-side switch 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/init.h> 1262306a36Sopenharmony_ci#include <linux/mutex.h> 1362306a36Sopenharmony_ci#include <linux/spi/spi.h> 1462306a36Sopenharmony_ci#include <linux/spi/mc33880.h> 1562306a36Sopenharmony_ci#include <linux/gpio/driver.h> 1662306a36Sopenharmony_ci#include <linux/slab.h> 1762306a36Sopenharmony_ci#include <linux/module.h> 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#define DRIVER_NAME "mc33880" 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci/* 2262306a36Sopenharmony_ci * Pin configurations, see MAX7301 datasheet page 6 2362306a36Sopenharmony_ci */ 2462306a36Sopenharmony_ci#define PIN_CONFIG_MASK 0x03 2562306a36Sopenharmony_ci#define PIN_CONFIG_IN_PULLUP 0x03 2662306a36Sopenharmony_ci#define PIN_CONFIG_IN_WO_PULLUP 0x02 2762306a36Sopenharmony_ci#define PIN_CONFIG_OUT 0x01 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define PIN_NUMBER 8 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci/* 3362306a36Sopenharmony_ci * Some registers must be read back to modify. 3462306a36Sopenharmony_ci * To save time we cache them here in memory 3562306a36Sopenharmony_ci */ 3662306a36Sopenharmony_cistruct mc33880 { 3762306a36Sopenharmony_ci struct mutex lock; /* protect from simultaneous accesses */ 3862306a36Sopenharmony_ci u8 port_config; 3962306a36Sopenharmony_ci struct gpio_chip chip; 4062306a36Sopenharmony_ci struct spi_device *spi; 4162306a36Sopenharmony_ci}; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_cistatic int mc33880_write_config(struct mc33880 *mc) 4462306a36Sopenharmony_ci{ 4562306a36Sopenharmony_ci return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config)); 4662306a36Sopenharmony_ci} 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_cistatic int __mc33880_set(struct mc33880 *mc, unsigned offset, int value) 5062306a36Sopenharmony_ci{ 5162306a36Sopenharmony_ci if (value) 5262306a36Sopenharmony_ci mc->port_config |= 1 << offset; 5362306a36Sopenharmony_ci else 5462306a36Sopenharmony_ci mc->port_config &= ~(1 << offset); 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci return mc33880_write_config(mc); 5762306a36Sopenharmony_ci} 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_cistatic void mc33880_set(struct gpio_chip *chip, unsigned offset, int value) 6162306a36Sopenharmony_ci{ 6262306a36Sopenharmony_ci struct mc33880 *mc = gpiochip_get_data(chip); 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci mutex_lock(&mc->lock); 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci __mc33880_set(mc, offset, value); 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci mutex_unlock(&mc->lock); 6962306a36Sopenharmony_ci} 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_cistatic int mc33880_probe(struct spi_device *spi) 7262306a36Sopenharmony_ci{ 7362306a36Sopenharmony_ci struct mc33880 *mc; 7462306a36Sopenharmony_ci struct mc33880_platform_data *pdata; 7562306a36Sopenharmony_ci int ret; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci pdata = dev_get_platdata(&spi->dev); 7862306a36Sopenharmony_ci if (!pdata || !pdata->base) { 7962306a36Sopenharmony_ci dev_dbg(&spi->dev, "incorrect or missing platform data\n"); 8062306a36Sopenharmony_ci return -EINVAL; 8162306a36Sopenharmony_ci } 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci /* 8462306a36Sopenharmony_ci * bits_per_word cannot be configured in platform data 8562306a36Sopenharmony_ci */ 8662306a36Sopenharmony_ci spi->bits_per_word = 8; 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci ret = spi_setup(spi); 8962306a36Sopenharmony_ci if (ret < 0) 9062306a36Sopenharmony_ci return ret; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci mc = devm_kzalloc(&spi->dev, sizeof(struct mc33880), GFP_KERNEL); 9362306a36Sopenharmony_ci if (!mc) 9462306a36Sopenharmony_ci return -ENOMEM; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci mutex_init(&mc->lock); 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_ci spi_set_drvdata(spi, mc); 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci mc->spi = spi; 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_ci mc->chip.label = DRIVER_NAME, 10362306a36Sopenharmony_ci mc->chip.set = mc33880_set; 10462306a36Sopenharmony_ci mc->chip.base = pdata->base; 10562306a36Sopenharmony_ci mc->chip.ngpio = PIN_NUMBER; 10662306a36Sopenharmony_ci mc->chip.can_sleep = true; 10762306a36Sopenharmony_ci mc->chip.parent = &spi->dev; 10862306a36Sopenharmony_ci mc->chip.owner = THIS_MODULE; 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci mc->port_config = 0x00; 11162306a36Sopenharmony_ci /* write twice, because during initialisation the first setting 11262306a36Sopenharmony_ci * is just for testing SPI communication, and the second is the 11362306a36Sopenharmony_ci * "real" configuration 11462306a36Sopenharmony_ci */ 11562306a36Sopenharmony_ci ret = mc33880_write_config(mc); 11662306a36Sopenharmony_ci mc->port_config = 0x00; 11762306a36Sopenharmony_ci if (!ret) 11862306a36Sopenharmony_ci ret = mc33880_write_config(mc); 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci if (ret) { 12162306a36Sopenharmony_ci dev_err(&spi->dev, "Failed writing to " DRIVER_NAME ": %d\n", 12262306a36Sopenharmony_ci ret); 12362306a36Sopenharmony_ci goto exit_destroy; 12462306a36Sopenharmony_ci } 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci ret = gpiochip_add_data(&mc->chip, mc); 12762306a36Sopenharmony_ci if (ret) 12862306a36Sopenharmony_ci goto exit_destroy; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci return ret; 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_ciexit_destroy: 13362306a36Sopenharmony_ci mutex_destroy(&mc->lock); 13462306a36Sopenharmony_ci return ret; 13562306a36Sopenharmony_ci} 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_cistatic void mc33880_remove(struct spi_device *spi) 13862306a36Sopenharmony_ci{ 13962306a36Sopenharmony_ci struct mc33880 *mc; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci mc = spi_get_drvdata(spi); 14262306a36Sopenharmony_ci 14362306a36Sopenharmony_ci gpiochip_remove(&mc->chip); 14462306a36Sopenharmony_ci mutex_destroy(&mc->lock); 14562306a36Sopenharmony_ci} 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_cistatic struct spi_driver mc33880_driver = { 14862306a36Sopenharmony_ci .driver = { 14962306a36Sopenharmony_ci .name = DRIVER_NAME, 15062306a36Sopenharmony_ci }, 15162306a36Sopenharmony_ci .probe = mc33880_probe, 15262306a36Sopenharmony_ci .remove = mc33880_remove, 15362306a36Sopenharmony_ci}; 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_cistatic int __init mc33880_init(void) 15662306a36Sopenharmony_ci{ 15762306a36Sopenharmony_ci return spi_register_driver(&mc33880_driver); 15862306a36Sopenharmony_ci} 15962306a36Sopenharmony_ci/* register after spi postcore initcall and before 16062306a36Sopenharmony_ci * subsys initcalls that may rely on these GPIOs 16162306a36Sopenharmony_ci */ 16262306a36Sopenharmony_cisubsys_initcall(mc33880_init); 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_cistatic void __exit mc33880_exit(void) 16562306a36Sopenharmony_ci{ 16662306a36Sopenharmony_ci spi_unregister_driver(&mc33880_driver); 16762306a36Sopenharmony_ci} 16862306a36Sopenharmony_cimodule_exit(mc33880_exit); 16962306a36Sopenharmony_ci 17062306a36Sopenharmony_ciMODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); 17162306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 17262306a36Sopenharmony_ci 173