1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Intel La Jolla Cove Adapter USB-GPIO driver 4 * 5 * Copyright (c) 2023, Intel Corporation. 6 */ 7 8#include <linux/acpi.h> 9#include <linux/bitfield.h> 10#include <linux/bitops.h> 11#include <linux/dev_printk.h> 12#include <linux/gpio/driver.h> 13#include <linux/irq.h> 14#include <linux/kernel.h> 15#include <linux/kref.h> 16#include <linux/mfd/ljca.h> 17#include <linux/module.h> 18#include <linux/platform_device.h> 19#include <linux/slab.h> 20#include <linux/types.h> 21 22/* GPIO commands */ 23#define LJCA_GPIO_CONFIG 1 24#define LJCA_GPIO_READ 2 25#define LJCA_GPIO_WRITE 3 26#define LJCA_GPIO_INT_EVENT 4 27#define LJCA_GPIO_INT_MASK 5 28#define LJCA_GPIO_INT_UNMASK 6 29 30#define LJCA_GPIO_CONF_DISABLE BIT(0) 31#define LJCA_GPIO_CONF_INPUT BIT(1) 32#define LJCA_GPIO_CONF_OUTPUT BIT(2) 33#define LJCA_GPIO_CONF_PULLUP BIT(3) 34#define LJCA_GPIO_CONF_PULLDOWN BIT(4) 35#define LJCA_GPIO_CONF_DEFAULT BIT(5) 36#define LJCA_GPIO_CONF_INTERRUPT BIT(6) 37#define LJCA_GPIO_INT_TYPE BIT(7) 38 39#define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1) 40#define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0) 41 42/* Intentional overlap with PULLUP / PULLDOWN */ 43#define LJCA_GPIO_CONF_SET BIT(3) 44#define LJCA_GPIO_CONF_CLR BIT(4) 45 46struct gpio_op { 47 u8 index; 48 u8 value; 49} __packed; 50 51struct gpio_packet { 52 u8 num; 53 struct gpio_op item[]; 54} __packed; 55 56#define LJCA_GPIO_BUF_SIZE 60 57struct ljca_gpio_dev { 58 struct platform_device *pdev; 59 struct gpio_chip gc; 60 struct ljca_gpio_info *gpio_info; 61 DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM); 62 DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM); 63 DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM); 64 u8 *connect_mode; 65 /* mutex to protect irq bus */ 66 struct mutex irq_lock; 67 struct work_struct work; 68 /* lock to protect package transfer to Hardware */ 69 struct mutex trans_lock; 70 71 u8 obuf[LJCA_GPIO_BUF_SIZE]; 72 u8 ibuf[LJCA_GPIO_BUF_SIZE]; 73}; 74 75static int gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, u8 config) 76{ 77 struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 78 int ret; 79 80 mutex_lock(&ljca_gpio->trans_lock); 81 packet->item[0].index = gpio_id; 82 packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id]; 83 packet->num = 1; 84 85 ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_CONFIG, packet, 86 struct_size(packet, item, packet->num), NULL, NULL); 87 mutex_unlock(&ljca_gpio->trans_lock); 88 return ret; 89} 90 91static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id) 92{ 93 struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 94 struct gpio_packet *ack_packet = (struct gpio_packet *)ljca_gpio->ibuf; 95 unsigned int ibuf_len = LJCA_GPIO_BUF_SIZE; 96 int ret; 97 98 mutex_lock(&ljca_gpio->trans_lock); 99 packet->num = 1; 100 packet->item[0].index = gpio_id; 101 ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_READ, packet, 102 struct_size(packet, item, packet->num), ljca_gpio->ibuf, &ibuf_len); 103 if (ret) 104 goto out_unlock; 105 106 if (!ibuf_len || ack_packet->num != packet->num) { 107 dev_err(&ljca_gpio->pdev->dev, "failed gpio_id:%u %u", gpio_id, ack_packet->num); 108 ret = -EIO; 109 } 110 111out_unlock: 112 mutex_unlock(&ljca_gpio->trans_lock); 113 if (ret) 114 return ret; 115 return ack_packet->item[0].value > 0; 116} 117 118static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, 119 int value) 120{ 121 struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 122 int ret; 123 124 mutex_lock(&ljca_gpio->trans_lock); 125 packet->num = 1; 126 packet->item[0].index = gpio_id; 127 packet->item[0].value = value & 1; 128 129 ret = ljca_transfer(ljca_gpio->gpio_info->ljca, LJCA_GPIO_WRITE, packet, 130 struct_size(packet, item, packet->num), NULL, NULL); 131 mutex_unlock(&ljca_gpio->trans_lock); 132 return ret; 133} 134 135static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset) 136{ 137 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 138 139 return ljca_gpio_read(ljca_gpio, offset); 140} 141 142static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset, 143 int val) 144{ 145 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 146 int ret; 147 148 ret = ljca_gpio_write(ljca_gpio, offset, val); 149 if (ret) 150 dev_err(chip->parent, "offset:%u val:%d set value failed %d\n", offset, val, ret); 151} 152 153static int ljca_gpio_direction_input(struct gpio_chip *chip, 154 unsigned int offset) 155{ 156 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 157 u8 config = LJCA_GPIO_CONF_INPUT | LJCA_GPIO_CONF_CLR; 158 159 return gpio_config(ljca_gpio, offset, config); 160} 161 162static int ljca_gpio_direction_output(struct gpio_chip *chip, 163 unsigned int offset, int val) 164{ 165 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 166 u8 config = LJCA_GPIO_CONF_OUTPUT | LJCA_GPIO_CONF_CLR; 167 int ret; 168 169 ret = gpio_config(ljca_gpio, offset, config); 170 if (ret) 171 return ret; 172 173 ljca_gpio_set_value(chip, offset, val); 174 return 0; 175} 176 177static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 178 unsigned long config) 179{ 180 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 181 182 ljca_gpio->connect_mode[offset] = 0; 183 switch (pinconf_to_config_param(config)) { 184 case PIN_CONFIG_BIAS_PULL_UP: 185 ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLUP; 186 break; 187 case PIN_CONFIG_BIAS_PULL_DOWN: 188 ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLDOWN; 189 break; 190 case PIN_CONFIG_DRIVE_PUSH_PULL: 191 case PIN_CONFIG_PERSIST_STATE: 192 break; 193 default: 194 return -ENOTSUPP; 195 } 196 197 return 0; 198} 199 200static int ljca_gpio_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, 201 unsigned int ngpios) 202{ 203 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip); 204 205 WARN_ON_ONCE(ngpios != ljca_gpio->gpio_info->num); 206 bitmap_copy(valid_mask, ljca_gpio->gpio_info->valid_pin_map, ngpios); 207 208 return 0; 209} 210 211static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, 212 unsigned int ngpios) 213{ 214 ljca_gpio_init_valid_mask(chip, valid_mask, ngpios); 215} 216 217static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id, bool enable) 218{ 219 struct gpio_packet *packet = (struct gpio_packet *)ljca_gpio->obuf; 220 int ret; 221 222 mutex_lock(&ljca_gpio->trans_lock); 223 packet->num = 1; 224 packet->item[0].index = gpio_id; 225 packet->item[0].value = 0; 226 227 ret = ljca_transfer(ljca_gpio->gpio_info->ljca, 228 enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK, packet, 229 struct_size(packet, item, packet->num), NULL, NULL); 230 mutex_unlock(&ljca_gpio->trans_lock); 231 return ret; 232} 233 234static void ljca_gpio_async(struct work_struct *work) 235{ 236 struct ljca_gpio_dev *ljca_gpio = container_of(work, struct ljca_gpio_dev, work); 237 int gpio_id; 238 int unmasked; 239 240 for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) { 241 clear_bit(gpio_id, ljca_gpio->reenable_irqs); 242 unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs); 243 if (unmasked) 244 ljca_enable_irq(ljca_gpio, gpio_id, true); 245 } 246} 247 248static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data, int len) 249{ 250 const struct gpio_packet *packet = evt_data; 251 struct ljca_gpio_dev *ljca_gpio = context; 252 int i; 253 int irq; 254 255 if (cmd != LJCA_GPIO_INT_EVENT) 256 return; 257 258 for (i = 0; i < packet->num; i++) { 259 irq = irq_find_mapping(ljca_gpio->gc.irq.domain, packet->item[i].index); 260 if (!irq) { 261 dev_err(ljca_gpio->gc.parent, "gpio_id %u does not mapped to IRQ yet\n", 262 packet->item[i].index); 263 return; 264 } 265 266 generic_handle_domain_irq(ljca_gpio->gc.irq.domain, irq); 267 set_bit(packet->item[i].index, ljca_gpio->reenable_irqs); 268 } 269 270 schedule_work(&ljca_gpio->work); 271} 272 273static void ljca_irq_unmask(struct irq_data *irqd) 274{ 275 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 276 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 277 int gpio_id = irqd_to_hwirq(irqd); 278 279 gpiochip_enable_irq(gc, gpio_id); 280 set_bit(gpio_id, ljca_gpio->unmasked_irqs); 281} 282 283static void ljca_irq_mask(struct irq_data *irqd) 284{ 285 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 286 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 287 int gpio_id = irqd_to_hwirq(irqd); 288 289 clear_bit(gpio_id, ljca_gpio->unmasked_irqs); 290 gpiochip_disable_irq(gc, gpio_id); 291} 292 293static int ljca_irq_set_type(struct irq_data *irqd, unsigned int type) 294{ 295 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 296 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 297 int gpio_id = irqd_to_hwirq(irqd); 298 299 ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT; 300 switch (type) { 301 case IRQ_TYPE_LEVEL_HIGH: 302 ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP); 303 break; 304 case IRQ_TYPE_LEVEL_LOW: 305 ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN); 306 break; 307 case IRQ_TYPE_EDGE_BOTH: 308 break; 309 case IRQ_TYPE_EDGE_RISING: 310 ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP); 311 break; 312 case IRQ_TYPE_EDGE_FALLING: 313 ljca_gpio->connect_mode[gpio_id] |= (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN); 314 break; 315 default: 316 return -EINVAL; 317 } 318 319 return 0; 320} 321 322static void ljca_irq_bus_lock(struct irq_data *irqd) 323{ 324 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 325 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 326 327 mutex_lock(&ljca_gpio->irq_lock); 328} 329 330static void ljca_irq_bus_unlock(struct irq_data *irqd) 331{ 332 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); 333 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc); 334 int gpio_id = irqd_to_hwirq(irqd); 335 int enabled; 336 int unmasked; 337 338 enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs); 339 unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs); 340 341 if (enabled != unmasked) { 342 if (unmasked) { 343 gpio_config(ljca_gpio, gpio_id, 0); 344 ljca_enable_irq(ljca_gpio, gpio_id, true); 345 set_bit(gpio_id, ljca_gpio->enabled_irqs); 346 } else { 347 ljca_enable_irq(ljca_gpio, gpio_id, false); 348 clear_bit(gpio_id, ljca_gpio->enabled_irqs); 349 } 350 } 351 352 mutex_unlock(&ljca_gpio->irq_lock); 353} 354 355static const struct irq_chip ljca_gpio_irqchip = { 356 .name = "ljca-irq", 357 .irq_mask = ljca_irq_mask, 358 .irq_unmask = ljca_irq_unmask, 359 .irq_set_type = ljca_irq_set_type, 360 .irq_bus_lock = ljca_irq_bus_lock, 361 .irq_bus_sync_unlock = ljca_irq_bus_unlock, 362 .flags = IRQCHIP_IMMUTABLE, 363 GPIOCHIP_IRQ_RESOURCE_HELPERS, 364}; 365 366static int ljca_gpio_probe(struct platform_device *pdev) 367{ 368 struct ljca_gpio_dev *ljca_gpio; 369 struct gpio_irq_chip *girq; 370 int ret; 371 372 ljca_gpio = devm_kzalloc(&pdev->dev, sizeof(*ljca_gpio), GFP_KERNEL); 373 if (!ljca_gpio) 374 return -ENOMEM; 375 376 ljca_gpio->gpio_info = dev_get_platdata(&pdev->dev); 377 ljca_gpio->connect_mode = devm_kcalloc(&pdev->dev, ljca_gpio->gpio_info->num, 378 sizeof(*ljca_gpio->connect_mode), GFP_KERNEL); 379 if (!ljca_gpio->connect_mode) 380 return -ENOMEM; 381 382 mutex_init(&ljca_gpio->irq_lock); 383 mutex_init(&ljca_gpio->trans_lock); 384 ljca_gpio->pdev = pdev; 385 ljca_gpio->gc.direction_input = ljca_gpio_direction_input; 386 ljca_gpio->gc.direction_output = ljca_gpio_direction_output; 387 ljca_gpio->gc.get = ljca_gpio_get_value; 388 ljca_gpio->gc.set = ljca_gpio_set_value; 389 ljca_gpio->gc.set_config = ljca_gpio_set_config; 390 ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask; 391 ljca_gpio->gc.can_sleep = true; 392 ljca_gpio->gc.parent = &pdev->dev; 393 394 ljca_gpio->gc.base = -1; 395 ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num; 396 ljca_gpio->gc.label = ACPI_COMPANION(&pdev->dev) ? 397 acpi_dev_name(ACPI_COMPANION(&pdev->dev)) : 398 dev_name(&pdev->dev); 399 ljca_gpio->gc.owner = THIS_MODULE; 400 401 platform_set_drvdata(pdev, ljca_gpio); 402 ljca_register_event_cb(ljca_gpio->gpio_info->ljca, ljca_gpio_event_cb, ljca_gpio); 403 404 girq = &ljca_gpio->gc.irq; 405 gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip); 406 girq->parent_handler = NULL; 407 girq->num_parents = 0; 408 girq->parents = NULL; 409 girq->default_type = IRQ_TYPE_NONE; 410 girq->handler = handle_simple_irq; 411 girq->init_valid_mask = ljca_gpio_irq_init_valid_mask; 412 413 INIT_WORK(&ljca_gpio->work, ljca_gpio_async); 414 ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio); 415 if (ret) { 416 ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca); 417 mutex_destroy(&ljca_gpio->irq_lock); 418 mutex_destroy(&ljca_gpio->trans_lock); 419 } 420 421 return ret; 422} 423 424static int ljca_gpio_remove(struct platform_device *pdev) 425{ 426 struct ljca_gpio_dev *ljca_gpio = platform_get_drvdata(pdev); 427 428 gpiochip_remove(&ljca_gpio->gc); 429 ljca_unregister_event_cb(ljca_gpio->gpio_info->ljca); 430 mutex_destroy(&ljca_gpio->irq_lock); 431 mutex_destroy(&ljca_gpio->trans_lock); 432 return 0; 433} 434 435#define LJCA_GPIO_DRV_NAME "ljca-gpio" 436static const struct platform_device_id ljca_gpio_id[] = { 437 { LJCA_GPIO_DRV_NAME, 0 }, 438 { /* sentinel */ } 439}; 440MODULE_DEVICE_TABLE(platform, ljca_gpio_id); 441 442static struct platform_driver ljca_gpio_driver = { 443 .driver.name = LJCA_GPIO_DRV_NAME, 444 .probe = ljca_gpio_probe, 445 .remove = ljca_gpio_remove, 446}; 447module_platform_driver(ljca_gpio_driver); 448 449MODULE_AUTHOR("Ye Xiang <xiang.ye@intel.com>"); 450MODULE_AUTHOR("Wang Zhifeng <zhifeng.wang@intel.com>"); 451MODULE_AUTHOR("Zhang Lixu <lixu.zhang@intel.com>"); 452MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver"); 453MODULE_LICENSE("GPL"); 454MODULE_IMPORT_NS(LJCA); 455