162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * GPIO driver for Exar XR17V35X chip 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2015 Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/bitops.h> 962306a36Sopenharmony_ci#include <linux/device.h> 1062306a36Sopenharmony_ci#include <linux/gpio/driver.h> 1162306a36Sopenharmony_ci#include <linux/idr.h> 1262306a36Sopenharmony_ci#include <linux/init.h> 1362306a36Sopenharmony_ci#include <linux/kernel.h> 1462306a36Sopenharmony_ci#include <linux/module.h> 1562306a36Sopenharmony_ci#include <linux/pci.h> 1662306a36Sopenharmony_ci#include <linux/platform_device.h> 1762306a36Sopenharmony_ci#include <linux/regmap.h> 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#define EXAR_OFFSET_MPIOLVL_LO 0x90 2062306a36Sopenharmony_ci#define EXAR_OFFSET_MPIOSEL_LO 0x93 2162306a36Sopenharmony_ci#define EXAR_OFFSET_MPIOLVL_HI 0x96 2262306a36Sopenharmony_ci#define EXAR_OFFSET_MPIOSEL_HI 0x99 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci/* 2562306a36Sopenharmony_ci * The Device Configuration and UART Configuration Registers 2662306a36Sopenharmony_ci * for each UART channel take 1KB of memory address space. 2762306a36Sopenharmony_ci */ 2862306a36Sopenharmony_ci#define EXAR_UART_CHANNEL_SIZE 0x400 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci#define DRIVER_NAME "gpio_exar" 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_cistatic DEFINE_IDA(ida_index); 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_cistruct exar_gpio_chip { 3562306a36Sopenharmony_ci struct gpio_chip gpio_chip; 3662306a36Sopenharmony_ci struct regmap *regmap; 3762306a36Sopenharmony_ci int index; 3862306a36Sopenharmony_ci char name[20]; 3962306a36Sopenharmony_ci unsigned int first_pin; 4062306a36Sopenharmony_ci /* 4162306a36Sopenharmony_ci * The offset to the cascaded device's (if existing) 4262306a36Sopenharmony_ci * Device Configuration Registers. 4362306a36Sopenharmony_ci */ 4462306a36Sopenharmony_ci unsigned int cascaded_offset; 4562306a36Sopenharmony_ci}; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cistatic unsigned int 4862306a36Sopenharmony_ciexar_offset_to_sel_addr(struct exar_gpio_chip *exar_gpio, unsigned int offset) 4962306a36Sopenharmony_ci{ 5062306a36Sopenharmony_ci unsigned int pin = exar_gpio->first_pin + (offset % 16); 5162306a36Sopenharmony_ci unsigned int cascaded = offset / 16; 5262306a36Sopenharmony_ci unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO; 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci return addr + (cascaded ? exar_gpio->cascaded_offset : 0); 5562306a36Sopenharmony_ci} 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_cistatic unsigned int 5862306a36Sopenharmony_ciexar_offset_to_lvl_addr(struct exar_gpio_chip *exar_gpio, unsigned int offset) 5962306a36Sopenharmony_ci{ 6062306a36Sopenharmony_ci unsigned int pin = exar_gpio->first_pin + (offset % 16); 6162306a36Sopenharmony_ci unsigned int cascaded = offset / 16; 6262306a36Sopenharmony_ci unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci return addr + (cascaded ? exar_gpio->cascaded_offset : 0); 6562306a36Sopenharmony_ci} 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_cistatic unsigned int 6862306a36Sopenharmony_ciexar_offset_to_bit(struct exar_gpio_chip *exar_gpio, unsigned int offset) 6962306a36Sopenharmony_ci{ 7062306a36Sopenharmony_ci unsigned int pin = exar_gpio->first_pin + (offset % 16); 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci return pin % 8; 7362306a36Sopenharmony_ci} 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistatic int exar_get_direction(struct gpio_chip *chip, unsigned int offset) 7662306a36Sopenharmony_ci{ 7762306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); 7862306a36Sopenharmony_ci unsigned int addr = exar_offset_to_sel_addr(exar_gpio, offset); 7962306a36Sopenharmony_ci unsigned int bit = exar_offset_to_bit(exar_gpio, offset); 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci if (regmap_test_bits(exar_gpio->regmap, addr, BIT(bit))) 8262306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_IN; 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_OUT; 8562306a36Sopenharmony_ci} 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cistatic int exar_get_value(struct gpio_chip *chip, unsigned int offset) 8862306a36Sopenharmony_ci{ 8962306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); 9062306a36Sopenharmony_ci unsigned int addr = exar_offset_to_lvl_addr(exar_gpio, offset); 9162306a36Sopenharmony_ci unsigned int bit = exar_offset_to_bit(exar_gpio, offset); 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci return !!(regmap_test_bits(exar_gpio->regmap, addr, BIT(bit))); 9462306a36Sopenharmony_ci} 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_cistatic void exar_set_value(struct gpio_chip *chip, unsigned int offset, 9762306a36Sopenharmony_ci int value) 9862306a36Sopenharmony_ci{ 9962306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); 10062306a36Sopenharmony_ci unsigned int addr = exar_offset_to_lvl_addr(exar_gpio, offset); 10162306a36Sopenharmony_ci unsigned int bit = exar_offset_to_bit(exar_gpio, offset); 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci if (value) 10462306a36Sopenharmony_ci regmap_set_bits(exar_gpio->regmap, addr, BIT(bit)); 10562306a36Sopenharmony_ci else 10662306a36Sopenharmony_ci regmap_clear_bits(exar_gpio->regmap, addr, BIT(bit)); 10762306a36Sopenharmony_ci} 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_cistatic int exar_direction_output(struct gpio_chip *chip, unsigned int offset, 11062306a36Sopenharmony_ci int value) 11162306a36Sopenharmony_ci{ 11262306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); 11362306a36Sopenharmony_ci unsigned int addr = exar_offset_to_sel_addr(exar_gpio, offset); 11462306a36Sopenharmony_ci unsigned int bit = exar_offset_to_bit(exar_gpio, offset); 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci exar_set_value(chip, offset, value); 11762306a36Sopenharmony_ci regmap_clear_bits(exar_gpio->regmap, addr, BIT(bit)); 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci return 0; 12062306a36Sopenharmony_ci} 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_cistatic int exar_direction_input(struct gpio_chip *chip, unsigned int offset) 12362306a36Sopenharmony_ci{ 12462306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); 12562306a36Sopenharmony_ci unsigned int addr = exar_offset_to_sel_addr(exar_gpio, offset); 12662306a36Sopenharmony_ci unsigned int bit = exar_offset_to_bit(exar_gpio, offset); 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci regmap_set_bits(exar_gpio->regmap, addr, BIT(bit)); 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci return 0; 13162306a36Sopenharmony_ci} 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_cistatic void exar_devm_ida_free(void *data) 13462306a36Sopenharmony_ci{ 13562306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio = data; 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci ida_free(&ida_index, exar_gpio->index); 13862306a36Sopenharmony_ci} 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_cistatic const struct regmap_config exar_regmap_config = { 14162306a36Sopenharmony_ci .name = "exar-gpio", 14262306a36Sopenharmony_ci .reg_bits = 16, 14362306a36Sopenharmony_ci .val_bits = 8, 14462306a36Sopenharmony_ci .io_port = true, 14562306a36Sopenharmony_ci}; 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_cistatic int gpio_exar_probe(struct platform_device *pdev) 14862306a36Sopenharmony_ci{ 14962306a36Sopenharmony_ci struct device *dev = &pdev->dev; 15062306a36Sopenharmony_ci struct pci_dev *pcidev = to_pci_dev(dev->parent); 15162306a36Sopenharmony_ci struct exar_gpio_chip *exar_gpio; 15262306a36Sopenharmony_ci u32 first_pin, ngpios; 15362306a36Sopenharmony_ci void __iomem *p; 15462306a36Sopenharmony_ci int index, ret; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci /* 15762306a36Sopenharmony_ci * The UART driver must have mapped region 0 prior to registering this 15862306a36Sopenharmony_ci * device - use it. 15962306a36Sopenharmony_ci */ 16062306a36Sopenharmony_ci p = pcim_iomap_table(pcidev)[0]; 16162306a36Sopenharmony_ci if (!p) 16262306a36Sopenharmony_ci return -ENOMEM; 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_ci ret = device_property_read_u32(dev, "exar,first-pin", &first_pin); 16562306a36Sopenharmony_ci if (ret) 16662306a36Sopenharmony_ci return ret; 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_ci ret = device_property_read_u32(dev, "ngpios", &ngpios); 16962306a36Sopenharmony_ci if (ret) 17062306a36Sopenharmony_ci return ret; 17162306a36Sopenharmony_ci 17262306a36Sopenharmony_ci exar_gpio = devm_kzalloc(dev, sizeof(*exar_gpio), GFP_KERNEL); 17362306a36Sopenharmony_ci if (!exar_gpio) 17462306a36Sopenharmony_ci return -ENOMEM; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_ci /* 17762306a36Sopenharmony_ci * If cascaded, secondary xr17v354 or xr17v358 have the same amount 17862306a36Sopenharmony_ci * of MPIOs as their primaries and the last 4 bits of the primary's 17962306a36Sopenharmony_ci * PCI Device ID is the number of its UART channels. 18062306a36Sopenharmony_ci */ 18162306a36Sopenharmony_ci if (pcidev->device & GENMASK(15, 12)) { 18262306a36Sopenharmony_ci ngpios += ngpios; 18362306a36Sopenharmony_ci exar_gpio->cascaded_offset = (pcidev->device & GENMASK(3, 0)) * 18462306a36Sopenharmony_ci EXAR_UART_CHANNEL_SIZE; 18562306a36Sopenharmony_ci } 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ci /* 18862306a36Sopenharmony_ci * We don't need to check the return values of mmio regmap operations (unless 18962306a36Sopenharmony_ci * the regmap has a clock attached which is not the case here). 19062306a36Sopenharmony_ci */ 19162306a36Sopenharmony_ci exar_gpio->regmap = devm_regmap_init_mmio(dev, p, &exar_regmap_config); 19262306a36Sopenharmony_ci if (IS_ERR(exar_gpio->regmap)) 19362306a36Sopenharmony_ci return PTR_ERR(exar_gpio->regmap); 19462306a36Sopenharmony_ci 19562306a36Sopenharmony_ci index = ida_alloc(&ida_index, GFP_KERNEL); 19662306a36Sopenharmony_ci if (index < 0) 19762306a36Sopenharmony_ci return index; 19862306a36Sopenharmony_ci 19962306a36Sopenharmony_ci ret = devm_add_action_or_reset(dev, exar_devm_ida_free, exar_gpio); 20062306a36Sopenharmony_ci if (ret) 20162306a36Sopenharmony_ci return ret; 20262306a36Sopenharmony_ci 20362306a36Sopenharmony_ci sprintf(exar_gpio->name, "exar_gpio%d", index); 20462306a36Sopenharmony_ci exar_gpio->gpio_chip.label = exar_gpio->name; 20562306a36Sopenharmony_ci exar_gpio->gpio_chip.parent = dev; 20662306a36Sopenharmony_ci exar_gpio->gpio_chip.direction_output = exar_direction_output; 20762306a36Sopenharmony_ci exar_gpio->gpio_chip.direction_input = exar_direction_input; 20862306a36Sopenharmony_ci exar_gpio->gpio_chip.get_direction = exar_get_direction; 20962306a36Sopenharmony_ci exar_gpio->gpio_chip.get = exar_get_value; 21062306a36Sopenharmony_ci exar_gpio->gpio_chip.set = exar_set_value; 21162306a36Sopenharmony_ci exar_gpio->gpio_chip.base = -1; 21262306a36Sopenharmony_ci exar_gpio->gpio_chip.ngpio = ngpios; 21362306a36Sopenharmony_ci exar_gpio->index = index; 21462306a36Sopenharmony_ci exar_gpio->first_pin = first_pin; 21562306a36Sopenharmony_ci 21662306a36Sopenharmony_ci ret = devm_gpiochip_add_data(dev, &exar_gpio->gpio_chip, exar_gpio); 21762306a36Sopenharmony_ci if (ret) 21862306a36Sopenharmony_ci return ret; 21962306a36Sopenharmony_ci 22062306a36Sopenharmony_ci return 0; 22162306a36Sopenharmony_ci} 22262306a36Sopenharmony_ci 22362306a36Sopenharmony_cistatic struct platform_driver gpio_exar_driver = { 22462306a36Sopenharmony_ci .probe = gpio_exar_probe, 22562306a36Sopenharmony_ci .driver = { 22662306a36Sopenharmony_ci .name = DRIVER_NAME, 22762306a36Sopenharmony_ci }, 22862306a36Sopenharmony_ci}; 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_cimodule_platform_driver(gpio_exar_driver); 23162306a36Sopenharmony_ci 23262306a36Sopenharmony_ciMODULE_ALIAS("platform:" DRIVER_NAME); 23362306a36Sopenharmony_ciMODULE_DESCRIPTION("Exar GPIO driver"); 23462306a36Sopenharmony_ciMODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>"); 23562306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 236