162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci// Copyright (C) 2018 ROHM Semiconductors 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci#include <linux/gpio/driver.h> 562306a36Sopenharmony_ci#include <linux/mfd/rohm-bd71828.h> 662306a36Sopenharmony_ci#include <linux/module.h> 762306a36Sopenharmony_ci#include <linux/platform_device.h> 862306a36Sopenharmony_ci#include <linux/regmap.h> 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#define GPIO_OUT_REG(off) (BD71828_REG_GPIO_CTRL1 + (off)) 1162306a36Sopenharmony_ci#define HALL_GPIO_OFFSET 3 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cistruct bd71828_gpio { 1462306a36Sopenharmony_ci struct regmap *regmap; 1562306a36Sopenharmony_ci struct device *dev; 1662306a36Sopenharmony_ci struct gpio_chip gpio; 1762306a36Sopenharmony_ci}; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_cistatic void bd71828_gpio_set(struct gpio_chip *chip, unsigned int offset, 2062306a36Sopenharmony_ci int value) 2162306a36Sopenharmony_ci{ 2262306a36Sopenharmony_ci int ret; 2362306a36Sopenharmony_ci struct bd71828_gpio *bdgpio = gpiochip_get_data(chip); 2462306a36Sopenharmony_ci u8 val = (value) ? BD71828_GPIO_OUT_HI : BD71828_GPIO_OUT_LO; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci /* 2762306a36Sopenharmony_ci * The HALL input pin can only be used as input. If this is the pin 2862306a36Sopenharmony_ci * we are dealing with - then we are done 2962306a36Sopenharmony_ci */ 3062306a36Sopenharmony_ci if (offset == HALL_GPIO_OFFSET) 3162306a36Sopenharmony_ci return; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci ret = regmap_update_bits(bdgpio->regmap, GPIO_OUT_REG(offset), 3462306a36Sopenharmony_ci BD71828_GPIO_OUT_MASK, val); 3562306a36Sopenharmony_ci if (ret) 3662306a36Sopenharmony_ci dev_err(bdgpio->dev, "Could not set gpio to %d\n", value); 3762306a36Sopenharmony_ci} 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistatic int bd71828_gpio_get(struct gpio_chip *chip, unsigned int offset) 4062306a36Sopenharmony_ci{ 4162306a36Sopenharmony_ci int ret; 4262306a36Sopenharmony_ci unsigned int val; 4362306a36Sopenharmony_ci struct bd71828_gpio *bdgpio = gpiochip_get_data(chip); 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci if (offset == HALL_GPIO_OFFSET) 4662306a36Sopenharmony_ci ret = regmap_read(bdgpio->regmap, BD71828_REG_IO_STAT, 4762306a36Sopenharmony_ci &val); 4862306a36Sopenharmony_ci else 4962306a36Sopenharmony_ci ret = regmap_read(bdgpio->regmap, GPIO_OUT_REG(offset), 5062306a36Sopenharmony_ci &val); 5162306a36Sopenharmony_ci if (!ret) 5262306a36Sopenharmony_ci ret = (val & BD71828_GPIO_OUT_MASK); 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci return ret; 5562306a36Sopenharmony_ci} 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_cistatic int bd71828_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 5862306a36Sopenharmony_ci unsigned long config) 5962306a36Sopenharmony_ci{ 6062306a36Sopenharmony_ci struct bd71828_gpio *bdgpio = gpiochip_get_data(chip); 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci if (offset == HALL_GPIO_OFFSET) 6362306a36Sopenharmony_ci return -ENOTSUPP; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci switch (pinconf_to_config_param(config)) { 6662306a36Sopenharmony_ci case PIN_CONFIG_DRIVE_OPEN_DRAIN: 6762306a36Sopenharmony_ci return regmap_update_bits(bdgpio->regmap, 6862306a36Sopenharmony_ci GPIO_OUT_REG(offset), 6962306a36Sopenharmony_ci BD71828_GPIO_DRIVE_MASK, 7062306a36Sopenharmony_ci BD71828_GPIO_OPEN_DRAIN); 7162306a36Sopenharmony_ci case PIN_CONFIG_DRIVE_PUSH_PULL: 7262306a36Sopenharmony_ci return regmap_update_bits(bdgpio->regmap, 7362306a36Sopenharmony_ci GPIO_OUT_REG(offset), 7462306a36Sopenharmony_ci BD71828_GPIO_DRIVE_MASK, 7562306a36Sopenharmony_ci BD71828_GPIO_PUSH_PULL); 7662306a36Sopenharmony_ci default: 7762306a36Sopenharmony_ci break; 7862306a36Sopenharmony_ci } 7962306a36Sopenharmony_ci return -ENOTSUPP; 8062306a36Sopenharmony_ci} 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_cistatic int bd71828_get_direction(struct gpio_chip *chip, unsigned int offset) 8362306a36Sopenharmony_ci{ 8462306a36Sopenharmony_ci /* 8562306a36Sopenharmony_ci * Pin usage is selected by OTP data. We can't read it runtime. Hence 8662306a36Sopenharmony_ci * we trust that if the pin is not excluded by "gpio-reserved-ranges" 8762306a36Sopenharmony_ci * the OTP configuration is set to OUT. (Other pins but HALL input pin 8862306a36Sopenharmony_ci * on BD71828 can't really be used for general purpose input - input 8962306a36Sopenharmony_ci * states are used for specific cases like regulator control or 9062306a36Sopenharmony_ci * PMIC_ON_REQ. 9162306a36Sopenharmony_ci */ 9262306a36Sopenharmony_ci if (offset == HALL_GPIO_OFFSET) 9362306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_IN; 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_OUT; 9662306a36Sopenharmony_ci} 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_cistatic int bd71828_probe(struct platform_device *pdev) 9962306a36Sopenharmony_ci{ 10062306a36Sopenharmony_ci struct device *dev = &pdev->dev; 10162306a36Sopenharmony_ci struct bd71828_gpio *bdgpio; 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci bdgpio = devm_kzalloc(dev, sizeof(*bdgpio), GFP_KERNEL); 10462306a36Sopenharmony_ci if (!bdgpio) 10562306a36Sopenharmony_ci return -ENOMEM; 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci bdgpio->dev = dev; 10862306a36Sopenharmony_ci bdgpio->gpio.parent = dev->parent; 10962306a36Sopenharmony_ci bdgpio->gpio.label = "bd71828-gpio"; 11062306a36Sopenharmony_ci bdgpio->gpio.owner = THIS_MODULE; 11162306a36Sopenharmony_ci bdgpio->gpio.get_direction = bd71828_get_direction; 11262306a36Sopenharmony_ci bdgpio->gpio.set_config = bd71828_gpio_set_config; 11362306a36Sopenharmony_ci bdgpio->gpio.can_sleep = true; 11462306a36Sopenharmony_ci bdgpio->gpio.get = bd71828_gpio_get; 11562306a36Sopenharmony_ci bdgpio->gpio.set = bd71828_gpio_set; 11662306a36Sopenharmony_ci bdgpio->gpio.base = -1; 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_ci /* 11962306a36Sopenharmony_ci * See if we need some implementation to mark some PINs as 12062306a36Sopenharmony_ci * not controllable based on DT info or if core can handle 12162306a36Sopenharmony_ci * "gpio-reserved-ranges" and exclude them from control 12262306a36Sopenharmony_ci */ 12362306a36Sopenharmony_ci bdgpio->gpio.ngpio = 4; 12462306a36Sopenharmony_ci bdgpio->regmap = dev_get_regmap(dev->parent, NULL); 12562306a36Sopenharmony_ci if (!bdgpio->regmap) 12662306a36Sopenharmony_ci return -ENODEV; 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci return devm_gpiochip_add_data(dev, &bdgpio->gpio, bdgpio); 12962306a36Sopenharmony_ci} 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_cistatic struct platform_driver bd71828_gpio = { 13262306a36Sopenharmony_ci .driver = { 13362306a36Sopenharmony_ci .name = "bd71828-gpio" 13462306a36Sopenharmony_ci }, 13562306a36Sopenharmony_ci .probe = bd71828_probe, 13662306a36Sopenharmony_ci}; 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_cimodule_platform_driver(bd71828_gpio); 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ciMODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>"); 14162306a36Sopenharmony_ciMODULE_DESCRIPTION("BD71828 voltage regulator driver"); 14262306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 14362306a36Sopenharmony_ciMODULE_ALIAS("platform:bd71828-gpio"); 144