162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * GPIO driver for the ACCES 104-IDI-48 family
462306a36Sopenharmony_ci * Copyright (C) 2015 William Breathitt Gray
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * This driver supports the following ACCES devices: 104-IDI-48A,
762306a36Sopenharmony_ci * 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC.
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci#include <linux/bits.h>
1062306a36Sopenharmony_ci#include <linux/device.h>
1162306a36Sopenharmony_ci#include <linux/err.h>
1262306a36Sopenharmony_ci#include <linux/gpio/regmap.h>
1362306a36Sopenharmony_ci#include <linux/interrupt.h>
1462306a36Sopenharmony_ci#include <linux/ioport.h>
1562306a36Sopenharmony_ci#include <linux/irq.h>
1662306a36Sopenharmony_ci#include <linux/isa.h>
1762306a36Sopenharmony_ci#include <linux/kernel.h>
1862306a36Sopenharmony_ci#include <linux/module.h>
1962306a36Sopenharmony_ci#include <linux/moduleparam.h>
2062306a36Sopenharmony_ci#include <linux/regmap.h>
2162306a36Sopenharmony_ci#include <linux/types.h>
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci#define IDI_48_EXTENT 8
2462306a36Sopenharmony_ci#define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT)
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_cistatic unsigned int base[MAX_NUM_IDI_48];
2762306a36Sopenharmony_cistatic unsigned int num_idi_48;
2862306a36Sopenharmony_cimodule_param_hw_array(base, uint, ioport, &num_idi_48, 0);
2962306a36Sopenharmony_ciMODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses");
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_cistatic unsigned int irq[MAX_NUM_IDI_48];
3262306a36Sopenharmony_cistatic unsigned int num_irq;
3362306a36Sopenharmony_cimodule_param_hw_array(irq, uint, irq, &num_irq, 0);
3462306a36Sopenharmony_ciMODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers");
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci#define IDI48_IRQ_STATUS 0x7
3762306a36Sopenharmony_ci#define IDI48_IRQ_ENABLE IDI48_IRQ_STATUS
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_cistatic int idi_48_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base,
4062306a36Sopenharmony_ci				 unsigned int offset, unsigned int *reg,
4162306a36Sopenharmony_ci				 unsigned int *mask)
4262306a36Sopenharmony_ci{
4362306a36Sopenharmony_ci	const unsigned int line = offset % 8;
4462306a36Sopenharmony_ci	const unsigned int stride = offset / 8;
4562306a36Sopenharmony_ci	const unsigned int port = (stride / 3) * 4;
4662306a36Sopenharmony_ci	const unsigned int port_stride = stride % 3;
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci	*reg = base + port + port_stride;
4962306a36Sopenharmony_ci	*mask = BIT(line);
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci	return 0;
5262306a36Sopenharmony_ci}
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_cistatic const struct regmap_range idi_48_wr_ranges[] = {
5562306a36Sopenharmony_ci	regmap_reg_range(0x0, 0x6),
5662306a36Sopenharmony_ci};
5762306a36Sopenharmony_cistatic const struct regmap_range idi_48_rd_ranges[] = {
5862306a36Sopenharmony_ci	regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x7),
5962306a36Sopenharmony_ci};
6062306a36Sopenharmony_cistatic const struct regmap_range idi_48_precious_ranges[] = {
6162306a36Sopenharmony_ci	regmap_reg_range(0x7, 0x7),
6262306a36Sopenharmony_ci};
6362306a36Sopenharmony_cistatic const struct regmap_access_table idi_48_wr_table = {
6462306a36Sopenharmony_ci	.no_ranges = idi_48_wr_ranges,
6562306a36Sopenharmony_ci	.n_no_ranges = ARRAY_SIZE(idi_48_wr_ranges),
6662306a36Sopenharmony_ci};
6762306a36Sopenharmony_cistatic const struct regmap_access_table idi_48_rd_table = {
6862306a36Sopenharmony_ci	.yes_ranges = idi_48_rd_ranges,
6962306a36Sopenharmony_ci	.n_yes_ranges = ARRAY_SIZE(idi_48_rd_ranges),
7062306a36Sopenharmony_ci};
7162306a36Sopenharmony_cistatic const struct regmap_access_table idi_48_precious_table = {
7262306a36Sopenharmony_ci	.yes_ranges = idi_48_precious_ranges,
7362306a36Sopenharmony_ci	.n_yes_ranges = ARRAY_SIZE(idi_48_precious_ranges),
7462306a36Sopenharmony_ci};
7562306a36Sopenharmony_cistatic const struct regmap_config idi48_regmap_config = {
7662306a36Sopenharmony_ci	.reg_bits = 8,
7762306a36Sopenharmony_ci	.reg_stride = 1,
7862306a36Sopenharmony_ci	.val_bits = 8,
7962306a36Sopenharmony_ci	.io_port = true,
8062306a36Sopenharmony_ci	.max_register = 0x6,
8162306a36Sopenharmony_ci	.wr_table = &idi_48_wr_table,
8262306a36Sopenharmony_ci	.rd_table = &idi_48_rd_table,
8362306a36Sopenharmony_ci	.precious_table = &idi_48_precious_table,
8462306a36Sopenharmony_ci	.use_raw_spinlock = true,
8562306a36Sopenharmony_ci};
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci#define IDI48_NGPIO 48
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci#define IDI48_REGMAP_IRQ(_id)						\
9062306a36Sopenharmony_ci	[_id] = {							\
9162306a36Sopenharmony_ci		.mask = BIT((_id) / 8),					\
9262306a36Sopenharmony_ci		.type = { .types_supported = IRQ_TYPE_EDGE_BOTH },	\
9362306a36Sopenharmony_ci	}
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_cistatic const struct regmap_irq idi48_regmap_irqs[IDI48_NGPIO] = {
9662306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(0), IDI48_REGMAP_IRQ(1), IDI48_REGMAP_IRQ(2), /* 0-2 */
9762306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(3), IDI48_REGMAP_IRQ(4), IDI48_REGMAP_IRQ(5), /* 3-5 */
9862306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(6), IDI48_REGMAP_IRQ(7), IDI48_REGMAP_IRQ(8), /* 6-8 */
9962306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(9), IDI48_REGMAP_IRQ(10), IDI48_REGMAP_IRQ(11), /* 9-11 */
10062306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(12), IDI48_REGMAP_IRQ(13), IDI48_REGMAP_IRQ(14), /* 12-14 */
10162306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(15), IDI48_REGMAP_IRQ(16), IDI48_REGMAP_IRQ(17), /* 15-17 */
10262306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(18), IDI48_REGMAP_IRQ(19), IDI48_REGMAP_IRQ(20), /* 18-20 */
10362306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(21), IDI48_REGMAP_IRQ(22), IDI48_REGMAP_IRQ(23), /* 21-23 */
10462306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(24), IDI48_REGMAP_IRQ(25), IDI48_REGMAP_IRQ(26), /* 24-26 */
10562306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(27), IDI48_REGMAP_IRQ(28), IDI48_REGMAP_IRQ(29), /* 27-29 */
10662306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(30), IDI48_REGMAP_IRQ(31), IDI48_REGMAP_IRQ(32), /* 30-32 */
10762306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(33), IDI48_REGMAP_IRQ(34), IDI48_REGMAP_IRQ(35), /* 33-35 */
10862306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(36), IDI48_REGMAP_IRQ(37), IDI48_REGMAP_IRQ(38), /* 36-38 */
10962306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(39), IDI48_REGMAP_IRQ(40), IDI48_REGMAP_IRQ(41), /* 39-41 */
11062306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(42), IDI48_REGMAP_IRQ(43), IDI48_REGMAP_IRQ(44), /* 42-44 */
11162306a36Sopenharmony_ci	IDI48_REGMAP_IRQ(45), IDI48_REGMAP_IRQ(46), IDI48_REGMAP_IRQ(47), /* 45-47 */
11262306a36Sopenharmony_ci};
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_cistatic const char *idi48_names[IDI48_NGPIO] = {
11562306a36Sopenharmony_ci	"Bit 0 A", "Bit 1 A", "Bit 2 A", "Bit 3 A", "Bit 4 A", "Bit 5 A",
11662306a36Sopenharmony_ci	"Bit 6 A", "Bit 7 A", "Bit 8 A", "Bit 9 A", "Bit 10 A", "Bit 11 A",
11762306a36Sopenharmony_ci	"Bit 12 A", "Bit 13 A", "Bit 14 A", "Bit 15 A",	"Bit 16 A", "Bit 17 A",
11862306a36Sopenharmony_ci	"Bit 18 A", "Bit 19 A", "Bit 20 A", "Bit 21 A", "Bit 22 A", "Bit 23 A",
11962306a36Sopenharmony_ci	"Bit 0 B", "Bit 1 B", "Bit 2 B", "Bit 3 B", "Bit 4 B", "Bit 5 B",
12062306a36Sopenharmony_ci	"Bit 6 B", "Bit 7 B", "Bit 8 B", "Bit 9 B", "Bit 10 B", "Bit 11 B",
12162306a36Sopenharmony_ci	"Bit 12 B", "Bit 13 B", "Bit 14 B", "Bit 15 B",	"Bit 16 B", "Bit 17 B",
12262306a36Sopenharmony_ci	"Bit 18 B", "Bit 19 B", "Bit 20 B", "Bit 21 B", "Bit 22 B", "Bit 23 B"
12362306a36Sopenharmony_ci};
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_cistatic int idi_48_probe(struct device *dev, unsigned int id)
12662306a36Sopenharmony_ci{
12762306a36Sopenharmony_ci	const char *const name = dev_name(dev);
12862306a36Sopenharmony_ci	struct gpio_regmap_config config = {};
12962306a36Sopenharmony_ci	void __iomem *regs;
13062306a36Sopenharmony_ci	struct regmap *map;
13162306a36Sopenharmony_ci	struct regmap_irq_chip *chip;
13262306a36Sopenharmony_ci	struct regmap_irq_chip_data *chip_data;
13362306a36Sopenharmony_ci	int err;
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci	if (!devm_request_region(dev, base[id], IDI_48_EXTENT, name)) {
13662306a36Sopenharmony_ci		dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
13762306a36Sopenharmony_ci			base[id], base[id] + IDI_48_EXTENT);
13862306a36Sopenharmony_ci		return -EBUSY;
13962306a36Sopenharmony_ci	}
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ci	regs = devm_ioport_map(dev, base[id], IDI_48_EXTENT);
14262306a36Sopenharmony_ci	if (!regs)
14362306a36Sopenharmony_ci		return -ENOMEM;
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci	map = devm_regmap_init_mmio(dev, regs, &idi48_regmap_config);
14662306a36Sopenharmony_ci	if (IS_ERR(map))
14762306a36Sopenharmony_ci		return dev_err_probe(dev, PTR_ERR(map),
14862306a36Sopenharmony_ci				     "Unable to initialize register map\n");
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ci	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
15162306a36Sopenharmony_ci	if (!chip)
15262306a36Sopenharmony_ci		return -ENOMEM;
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci	chip->name = name;
15562306a36Sopenharmony_ci	chip->status_base = IDI48_IRQ_STATUS;
15662306a36Sopenharmony_ci	chip->unmask_base = IDI48_IRQ_ENABLE;
15762306a36Sopenharmony_ci	chip->clear_on_unmask = true;
15862306a36Sopenharmony_ci	chip->num_regs = 1;
15962306a36Sopenharmony_ci	chip->irqs = idi48_regmap_irqs;
16062306a36Sopenharmony_ci	chip->num_irqs = ARRAY_SIZE(idi48_regmap_irqs);
16162306a36Sopenharmony_ci
16262306a36Sopenharmony_ci	err = devm_regmap_add_irq_chip(dev, map, irq[id], IRQF_SHARED, 0, chip,
16362306a36Sopenharmony_ci				       &chip_data);
16462306a36Sopenharmony_ci	if (err)
16562306a36Sopenharmony_ci		return dev_err_probe(dev, err, "IRQ registration failed\n");
16662306a36Sopenharmony_ci
16762306a36Sopenharmony_ci	config.parent = dev;
16862306a36Sopenharmony_ci	config.regmap = map;
16962306a36Sopenharmony_ci	config.ngpio = IDI48_NGPIO;
17062306a36Sopenharmony_ci	config.names = idi48_names;
17162306a36Sopenharmony_ci	config.reg_dat_base = GPIO_REGMAP_ADDR(0x0);
17262306a36Sopenharmony_ci	config.ngpio_per_reg = 8;
17362306a36Sopenharmony_ci	config.reg_mask_xlate = idi_48_reg_mask_xlate;
17462306a36Sopenharmony_ci	config.irq_domain = regmap_irq_get_domain(chip_data);
17562306a36Sopenharmony_ci
17662306a36Sopenharmony_ci	return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config));
17762306a36Sopenharmony_ci}
17862306a36Sopenharmony_ci
17962306a36Sopenharmony_cistatic struct isa_driver idi_48_driver = {
18062306a36Sopenharmony_ci	.probe = idi_48_probe,
18162306a36Sopenharmony_ci	.driver = {
18262306a36Sopenharmony_ci		.name = "104-idi-48"
18362306a36Sopenharmony_ci	},
18462306a36Sopenharmony_ci};
18562306a36Sopenharmony_cimodule_isa_driver_with_irq(idi_48_driver, num_idi_48, num_irq);
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ciMODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
18862306a36Sopenharmony_ciMODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
18962306a36Sopenharmony_ciMODULE_LICENSE("GPL v2");
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