162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci# 362306a36Sopenharmony_ci# FPGA framework configuration 462306a36Sopenharmony_ci# 562306a36Sopenharmony_ci 662306a36Sopenharmony_cimenuconfig FPGA 762306a36Sopenharmony_ci tristate "FPGA Configuration Framework" 862306a36Sopenharmony_ci help 962306a36Sopenharmony_ci Say Y here if you want support for configuring FPGAs from the 1062306a36Sopenharmony_ci kernel. The FPGA framework adds an FPGA manager class and FPGA 1162306a36Sopenharmony_ci manager drivers. 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciif FPGA 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciconfig FPGA_MGR_SOCFPGA 1662306a36Sopenharmony_ci tristate "Altera SOCFPGA FPGA Manager" 1762306a36Sopenharmony_ci depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST 1862306a36Sopenharmony_ci help 1962306a36Sopenharmony_ci FPGA manager driver support for Altera SOCFPGA. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciconfig FPGA_MGR_SOCFPGA_A10 2262306a36Sopenharmony_ci tristate "Altera SoCFPGA Arria10" 2362306a36Sopenharmony_ci depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST 2462306a36Sopenharmony_ci select REGMAP_MMIO 2562306a36Sopenharmony_ci help 2662306a36Sopenharmony_ci FPGA manager driver support for Altera Arria10 SoCFPGA. 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ciconfig ALTERA_PR_IP_CORE 2962306a36Sopenharmony_ci tristate "Altera Partial Reconfiguration IP Core" 3062306a36Sopenharmony_ci help 3162306a36Sopenharmony_ci Core driver support for Altera Partial Reconfiguration IP component 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ciconfig ALTERA_PR_IP_CORE_PLAT 3462306a36Sopenharmony_ci tristate "Platform support of Altera Partial Reconfiguration IP Core" 3562306a36Sopenharmony_ci depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM 3662306a36Sopenharmony_ci help 3762306a36Sopenharmony_ci Platform driver support for Altera Partial Reconfiguration IP 3862306a36Sopenharmony_ci component 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ciconfig FPGA_MGR_ALTERA_PS_SPI 4162306a36Sopenharmony_ci tristate "Altera FPGA Passive Serial over SPI" 4262306a36Sopenharmony_ci depends on SPI 4362306a36Sopenharmony_ci select BITREVERSE 4462306a36Sopenharmony_ci help 4562306a36Sopenharmony_ci FPGA manager driver support for Altera Arria/Cyclone/Stratix 4662306a36Sopenharmony_ci using the passive serial interface over SPI. 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ciconfig FPGA_MGR_ALTERA_CVP 4962306a36Sopenharmony_ci tristate "Altera CvP FPGA Manager" 5062306a36Sopenharmony_ci depends on PCI 5162306a36Sopenharmony_ci help 5262306a36Sopenharmony_ci FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V, 5362306a36Sopenharmony_ci Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe. 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ciconfig FPGA_MGR_ZYNQ_FPGA 5662306a36Sopenharmony_ci tristate "Xilinx Zynq FPGA" 5762306a36Sopenharmony_ci depends on ARCH_ZYNQ || COMPILE_TEST 5862306a36Sopenharmony_ci help 5962306a36Sopenharmony_ci FPGA manager driver support for Xilinx Zynq FPGAs. 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ciconfig FPGA_MGR_STRATIX10_SOC 6262306a36Sopenharmony_ci tristate "Intel Stratix10 SoC FPGA Manager" 6362306a36Sopenharmony_ci depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) 6462306a36Sopenharmony_ci help 6562306a36Sopenharmony_ci FPGA manager driver support for the Intel Stratix10 SoC. 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ciconfig FPGA_MGR_XILINX_SPI 6862306a36Sopenharmony_ci tristate "Xilinx Configuration over Slave Serial (SPI)" 6962306a36Sopenharmony_ci depends on SPI 7062306a36Sopenharmony_ci help 7162306a36Sopenharmony_ci FPGA manager driver support for Xilinx FPGA configuration 7262306a36Sopenharmony_ci over slave serial interface. 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ciconfig FPGA_MGR_ICE40_SPI 7562306a36Sopenharmony_ci tristate "Lattice iCE40 SPI" 7662306a36Sopenharmony_ci depends on OF && SPI 7762306a36Sopenharmony_ci help 7862306a36Sopenharmony_ci FPGA manager driver support for Lattice iCE40 FPGAs over SPI. 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ciconfig FPGA_MGR_MACHXO2_SPI 8162306a36Sopenharmony_ci tristate "Lattice MachXO2 SPI" 8262306a36Sopenharmony_ci depends on SPI 8362306a36Sopenharmony_ci help 8462306a36Sopenharmony_ci FPGA manager driver support for Lattice MachXO2 configuration 8562306a36Sopenharmony_ci over slave SPI interface. 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ciconfig FPGA_MGR_TS73XX 8862306a36Sopenharmony_ci tristate "Technologic Systems TS-73xx SBC FPGA Manager" 8962306a36Sopenharmony_ci depends on ARCH_EP93XX && MACH_TS72XX 9062306a36Sopenharmony_ci help 9162306a36Sopenharmony_ci FPGA manager driver support for the Altera Cyclone II FPGA 9262306a36Sopenharmony_ci present on the TS-73xx SBC boards. 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ciconfig FPGA_BRIDGE 9562306a36Sopenharmony_ci tristate "FPGA Bridge Framework" 9662306a36Sopenharmony_ci help 9762306a36Sopenharmony_ci Say Y here if you want to support bridges connected between host 9862306a36Sopenharmony_ci processors and FPGAs or between FPGAs. 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ciconfig SOCFPGA_FPGA_BRIDGE 10162306a36Sopenharmony_ci tristate "Altera SoCFPGA FPGA Bridges" 10262306a36Sopenharmony_ci depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE 10362306a36Sopenharmony_ci help 10462306a36Sopenharmony_ci Say Y to enable drivers for FPGA bridges for Altera SOCFPGA 10562306a36Sopenharmony_ci devices. 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ciconfig ALTERA_FREEZE_BRIDGE 10862306a36Sopenharmony_ci tristate "Altera FPGA Freeze Bridge" 10962306a36Sopenharmony_ci depends on FPGA_BRIDGE && HAS_IOMEM 11062306a36Sopenharmony_ci help 11162306a36Sopenharmony_ci Say Y to enable drivers for Altera FPGA Freeze bridges. A 11262306a36Sopenharmony_ci freeze bridge is a bridge that exists in the FPGA fabric to 11362306a36Sopenharmony_ci isolate one region of the FPGA from the busses while that 11462306a36Sopenharmony_ci region is being reprogrammed. 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ciconfig XILINX_PR_DECOUPLER 11762306a36Sopenharmony_ci tristate "Xilinx LogiCORE PR Decoupler" 11862306a36Sopenharmony_ci depends on FPGA_BRIDGE 11962306a36Sopenharmony_ci depends on HAS_IOMEM 12062306a36Sopenharmony_ci help 12162306a36Sopenharmony_ci Say Y to enable drivers for Xilinx LogiCORE PR Decoupler 12262306a36Sopenharmony_ci or Xilinx Dynamic Function eXchange AIX Shutdown Manager. 12362306a36Sopenharmony_ci The PR Decoupler exists in the FPGA fabric to isolate one 12462306a36Sopenharmony_ci region of the FPGA from the busses while that region is 12562306a36Sopenharmony_ci being reprogrammed during partial reconfig. 12662306a36Sopenharmony_ci The Dynamic Function eXchange AXI shutdown manager prevents 12762306a36Sopenharmony_ci AXI traffic from passing through the bridge. The controller 12862306a36Sopenharmony_ci safely handles AXI4MM and AXI4-Lite interfaces on a 12962306a36Sopenharmony_ci Reconfigurable Partition when it is undergoing dynamic 13062306a36Sopenharmony_ci reconfiguration, preventing the system deadlock that can 13162306a36Sopenharmony_ci occur if AXI transactions are interrupted by DFX. 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ciconfig FPGA_REGION 13462306a36Sopenharmony_ci tristate "FPGA Region" 13562306a36Sopenharmony_ci depends on FPGA_BRIDGE 13662306a36Sopenharmony_ci help 13762306a36Sopenharmony_ci FPGA Region common code. An FPGA Region controls an FPGA Manager 13862306a36Sopenharmony_ci and the FPGA Bridges associated with either a reconfigurable 13962306a36Sopenharmony_ci region of an FPGA or a whole FPGA. 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ciconfig OF_FPGA_REGION 14262306a36Sopenharmony_ci tristate "FPGA Region Device Tree Overlay Support" 14362306a36Sopenharmony_ci depends on OF && FPGA_REGION 14462306a36Sopenharmony_ci help 14562306a36Sopenharmony_ci Support for loading FPGA images by applying a Device Tree 14662306a36Sopenharmony_ci overlay. 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ciconfig FPGA_DFL 14962306a36Sopenharmony_ci tristate "FPGA Device Feature List (DFL) support" 15062306a36Sopenharmony_ci select FPGA_BRIDGE 15162306a36Sopenharmony_ci select FPGA_REGION 15262306a36Sopenharmony_ci depends on HAS_IOMEM 15362306a36Sopenharmony_ci help 15462306a36Sopenharmony_ci Device Feature List (DFL) defines a feature list structure that 15562306a36Sopenharmony_ci creates a linked list of feature headers within the MMIO space 15662306a36Sopenharmony_ci to provide an extensible way of adding features for FPGA. 15762306a36Sopenharmony_ci Driver can walk through the feature headers to enumerate feature 15862306a36Sopenharmony_ci devices (e.g. FPGA Management Engine, Port and Accelerator 15962306a36Sopenharmony_ci Function Unit) and their private features for target FPGA devices. 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ci Select this option to enable common support for Field-Programmable 16262306a36Sopenharmony_ci Gate Array (FPGA) solutions which implement Device Feature List. 16362306a36Sopenharmony_ci It provides enumeration APIs and feature device infrastructure. 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_ciconfig FPGA_DFL_FME 16662306a36Sopenharmony_ci tristate "FPGA DFL FME Driver" 16762306a36Sopenharmony_ci depends on FPGA_DFL && HWMON && PERF_EVENTS 16862306a36Sopenharmony_ci help 16962306a36Sopenharmony_ci The FPGA Management Engine (FME) is a feature device implemented 17062306a36Sopenharmony_ci under Device Feature List (DFL) framework. Select this option to 17162306a36Sopenharmony_ci enable the platform device driver for FME which implements all 17262306a36Sopenharmony_ci FPGA platform level management features. There shall be one FME 17362306a36Sopenharmony_ci per DFL based FPGA device. 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_ciconfig FPGA_DFL_FME_MGR 17662306a36Sopenharmony_ci tristate "FPGA DFL FME Manager Driver" 17762306a36Sopenharmony_ci depends on FPGA_DFL_FME && HAS_IOMEM 17862306a36Sopenharmony_ci help 17962306a36Sopenharmony_ci Say Y to enable FPGA Manager driver for FPGA Management Engine. 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_ciconfig FPGA_DFL_FME_BRIDGE 18262306a36Sopenharmony_ci tristate "FPGA DFL FME Bridge Driver" 18362306a36Sopenharmony_ci depends on FPGA_DFL_FME && HAS_IOMEM 18462306a36Sopenharmony_ci help 18562306a36Sopenharmony_ci Say Y to enable FPGA Bridge driver for FPGA Management Engine. 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ciconfig FPGA_DFL_FME_REGION 18862306a36Sopenharmony_ci tristate "FPGA DFL FME Region Driver" 18962306a36Sopenharmony_ci depends on FPGA_DFL_FME && HAS_IOMEM 19062306a36Sopenharmony_ci help 19162306a36Sopenharmony_ci Say Y to enable FPGA Region driver for FPGA Management Engine. 19262306a36Sopenharmony_ci 19362306a36Sopenharmony_ciconfig FPGA_DFL_AFU 19462306a36Sopenharmony_ci tristate "FPGA DFL AFU Driver" 19562306a36Sopenharmony_ci depends on FPGA_DFL 19662306a36Sopenharmony_ci help 19762306a36Sopenharmony_ci This is the driver for FPGA Accelerated Function Unit (AFU) which 19862306a36Sopenharmony_ci implements AFU and Port management features. A User AFU connects 19962306a36Sopenharmony_ci to the FPGA infrastructure via a Port. There may be more than one 20062306a36Sopenharmony_ci Port/AFU per DFL based FPGA device. 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ciconfig FPGA_DFL_NIOS_INTEL_PAC_N3000 20362306a36Sopenharmony_ci tristate "FPGA DFL NIOS Driver for Intel PAC N3000" 20462306a36Sopenharmony_ci depends on FPGA_DFL 20562306a36Sopenharmony_ci select REGMAP 20662306a36Sopenharmony_ci help 20762306a36Sopenharmony_ci This is the driver for the N3000 Nios private feature on Intel 20862306a36Sopenharmony_ci PAC (Programmable Acceleration Card) N3000. It communicates 20962306a36Sopenharmony_ci with the embedded Nios processor to configure the retimers on 21062306a36Sopenharmony_ci the card. It also instantiates the SPI master (spi-altera) for 21162306a36Sopenharmony_ci the card's BMC (Board Management Controller). 21262306a36Sopenharmony_ci 21362306a36Sopenharmony_ciconfig FPGA_DFL_PCI 21462306a36Sopenharmony_ci tristate "FPGA DFL PCIe Device Driver" 21562306a36Sopenharmony_ci depends on PCI && FPGA_DFL 21662306a36Sopenharmony_ci help 21762306a36Sopenharmony_ci Select this option to enable PCIe driver for PCIe-based 21862306a36Sopenharmony_ci Field-Programmable Gate Array (FPGA) solutions which implement 21962306a36Sopenharmony_ci the Device Feature List (DFL). This driver provides interfaces 22062306a36Sopenharmony_ci for userspace applications to configure, enumerate, open and access 22162306a36Sopenharmony_ci FPGA accelerators on the FPGA DFL devices, enables system level 22262306a36Sopenharmony_ci management functions such as FPGA partial reconfiguration, power 22362306a36Sopenharmony_ci management and virtualization with DFL framework and DFL feature 22462306a36Sopenharmony_ci device drivers. 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci To compile this as a module, choose M here. 22762306a36Sopenharmony_ci 22862306a36Sopenharmony_ciconfig FPGA_MGR_ZYNQMP_FPGA 22962306a36Sopenharmony_ci tristate "Xilinx ZynqMP FPGA" 23062306a36Sopenharmony_ci depends on ZYNQMP_FIRMWARE || (!ZYNQMP_FIRMWARE && COMPILE_TEST) 23162306a36Sopenharmony_ci help 23262306a36Sopenharmony_ci FPGA manager driver support for Xilinx ZynqMP FPGAs. 23362306a36Sopenharmony_ci This driver uses the processor configuration port(PCAP) 23462306a36Sopenharmony_ci to configure the programmable logic(PL) through PS 23562306a36Sopenharmony_ci on ZynqMP SoC. 23662306a36Sopenharmony_ci 23762306a36Sopenharmony_ciconfig FPGA_MGR_VERSAL_FPGA 23862306a36Sopenharmony_ci tristate "Xilinx Versal FPGA" 23962306a36Sopenharmony_ci depends on ARCH_ZYNQMP || COMPILE_TEST 24062306a36Sopenharmony_ci help 24162306a36Sopenharmony_ci Select this option to enable FPGA manager driver support for 24262306a36Sopenharmony_ci Xilinx Versal SoC. This driver uses the firmware interface to 24362306a36Sopenharmony_ci configure the programmable logic(PL). 24462306a36Sopenharmony_ci 24562306a36Sopenharmony_ci To compile this as a module, choose M here. 24662306a36Sopenharmony_ci 24762306a36Sopenharmony_ciconfig FPGA_M10_BMC_SEC_UPDATE 24862306a36Sopenharmony_ci tristate "Intel MAX10 BMC Secure Update driver" 24962306a36Sopenharmony_ci depends on MFD_INTEL_M10_BMC_CORE 25062306a36Sopenharmony_ci select FW_LOADER 25162306a36Sopenharmony_ci select FW_UPLOAD 25262306a36Sopenharmony_ci help 25362306a36Sopenharmony_ci Secure update support for the Intel MAX10 board management 25462306a36Sopenharmony_ci controller. 25562306a36Sopenharmony_ci 25662306a36Sopenharmony_ci This is a subdriver of the Intel MAX10 board management controller 25762306a36Sopenharmony_ci (BMC) and provides support for secure updates for the BMC image, 25862306a36Sopenharmony_ci the FPGA image, the Root Entry Hashes, etc. 25962306a36Sopenharmony_ci 26062306a36Sopenharmony_ciconfig FPGA_MGR_MICROCHIP_SPI 26162306a36Sopenharmony_ci tristate "Microchip Polarfire SPI FPGA manager" 26262306a36Sopenharmony_ci depends on SPI 26362306a36Sopenharmony_ci help 26462306a36Sopenharmony_ci FPGA manager driver support for Microchip Polarfire FPGAs 26562306a36Sopenharmony_ci programming over slave SPI interface with .dat formatted 26662306a36Sopenharmony_ci bitstream image. 26762306a36Sopenharmony_ci 26862306a36Sopenharmony_ciconfig FPGA_MGR_LATTICE_SYSCONFIG 26962306a36Sopenharmony_ci tristate 27062306a36Sopenharmony_ci 27162306a36Sopenharmony_ciconfig FPGA_MGR_LATTICE_SYSCONFIG_SPI 27262306a36Sopenharmony_ci tristate "Lattice sysCONFIG SPI FPGA manager" 27362306a36Sopenharmony_ci depends on SPI 27462306a36Sopenharmony_ci select FPGA_MGR_LATTICE_SYSCONFIG 27562306a36Sopenharmony_ci help 27662306a36Sopenharmony_ci FPGA manager driver support for Lattice FPGAs programming over slave 27762306a36Sopenharmony_ci SPI sysCONFIG interface. 27862306a36Sopenharmony_ci 27962306a36Sopenharmony_cisource "drivers/fpga/tests/Kconfig" 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ciendif # FPGA 282