1// SPDX-License-Identifier: GPL-2.0
2/*
3 *  Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
4 */
5
6#include <linux/kernel.h>
7
8#include "k3-psil-priv.h"
9
10#define PSIL_PDMA_XY_TR(x)				\
11	{						\
12		.thread_id = x,				\
13		.ep_config = {				\
14			.ep_type = PSIL_EP_PDMA_XY,	\
15		},					\
16	}
17
18#define PSIL_PDMA_XY_PKT(x)				\
19	{						\
20		.thread_id = x,				\
21		.ep_config = {				\
22			.ep_type = PSIL_EP_PDMA_XY,	\
23			.pkt_mode = 1,			\
24		},					\
25	}
26
27#define PSIL_PDMA_MCASP(x)				\
28	{						\
29		.thread_id = x,				\
30		.ep_config = {				\
31			.ep_type = PSIL_EP_PDMA_XY,	\
32			.pdma_acc32 = 1,		\
33			.pdma_burst = 1,		\
34		},					\
35	}
36
37#define PSIL_ETHERNET(x)				\
38	{						\
39		.thread_id = x,				\
40		.ep_config = {				\
41			.ep_type = PSIL_EP_NATIVE,	\
42			.pkt_mode = 1,			\
43			.needs_epib = 1,		\
44			.psd_size = 16,			\
45		},					\
46	}
47
48#define PSIL_SA2UL(x, tx)				\
49	{						\
50		.thread_id = x,				\
51		.ep_config = {				\
52			.ep_type = PSIL_EP_NATIVE,	\
53			.pkt_mode = 1,			\
54			.needs_epib = 1,		\
55			.psd_size = 64,			\
56			.notdpkt = tx,			\
57		},					\
58	}
59
60/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
61static struct psil_ep j721s2_src_ep_map[] = {
62	/* PDMA_MCASP - McASP0-4 */
63	PSIL_PDMA_MCASP(0x4400),
64	PSIL_PDMA_MCASP(0x4401),
65	PSIL_PDMA_MCASP(0x4402),
66	PSIL_PDMA_MCASP(0x4403),
67	PSIL_PDMA_MCASP(0x4404),
68	/* PDMA_SPI_G0 - SPI0-3 */
69	PSIL_PDMA_XY_PKT(0x4600),
70	PSIL_PDMA_XY_PKT(0x4601),
71	PSIL_PDMA_XY_PKT(0x4602),
72	PSIL_PDMA_XY_PKT(0x4603),
73	PSIL_PDMA_XY_PKT(0x4604),
74	PSIL_PDMA_XY_PKT(0x4605),
75	PSIL_PDMA_XY_PKT(0x4606),
76	PSIL_PDMA_XY_PKT(0x4607),
77	PSIL_PDMA_XY_PKT(0x4608),
78	PSIL_PDMA_XY_PKT(0x4609),
79	PSIL_PDMA_XY_PKT(0x460a),
80	PSIL_PDMA_XY_PKT(0x460b),
81	PSIL_PDMA_XY_PKT(0x460c),
82	PSIL_PDMA_XY_PKT(0x460d),
83	PSIL_PDMA_XY_PKT(0x460e),
84	PSIL_PDMA_XY_PKT(0x460f),
85	/* PDMA_SPI_G1 - SPI4-7 */
86	PSIL_PDMA_XY_PKT(0x4610),
87	PSIL_PDMA_XY_PKT(0x4611),
88	PSIL_PDMA_XY_PKT(0x4612),
89	PSIL_PDMA_XY_PKT(0x4613),
90	PSIL_PDMA_XY_PKT(0x4614),
91	PSIL_PDMA_XY_PKT(0x4615),
92	PSIL_PDMA_XY_PKT(0x4616),
93	PSIL_PDMA_XY_PKT(0x4617),
94	PSIL_PDMA_XY_PKT(0x4618),
95	PSIL_PDMA_XY_PKT(0x4619),
96	PSIL_PDMA_XY_PKT(0x461a),
97	PSIL_PDMA_XY_PKT(0x461b),
98	PSIL_PDMA_XY_PKT(0x461c),
99	PSIL_PDMA_XY_PKT(0x461d),
100	PSIL_PDMA_XY_PKT(0x461e),
101	PSIL_PDMA_XY_PKT(0x461f),
102	/* MAIN_CPSW2G */
103	PSIL_ETHERNET(0x4640),
104	/* PDMA_USART_G0 - UART0-1 */
105	PSIL_PDMA_XY_PKT(0x4700),
106	PSIL_PDMA_XY_PKT(0x4701),
107	/* PDMA_USART_G1 - UART2-3 */
108	PSIL_PDMA_XY_PKT(0x4702),
109	PSIL_PDMA_XY_PKT(0x4703),
110	/* PDMA_USART_G2 - UART4-9 */
111	PSIL_PDMA_XY_PKT(0x4704),
112	PSIL_PDMA_XY_PKT(0x4705),
113	PSIL_PDMA_XY_PKT(0x4706),
114	PSIL_PDMA_XY_PKT(0x4707),
115	PSIL_PDMA_XY_PKT(0x4708),
116	PSIL_PDMA_XY_PKT(0x4709),
117	/* MAIN SA2UL */
118	PSIL_SA2UL(0x4a40, 0),
119	PSIL_SA2UL(0x4a41, 0),
120	PSIL_SA2UL(0x4a42, 0),
121	PSIL_SA2UL(0x4a43, 0),
122	/* CPSW0 */
123	PSIL_ETHERNET(0x7000),
124	/* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
125	PSIL_PDMA_XY_PKT(0x7100),
126	PSIL_PDMA_XY_PKT(0x7101),
127	PSIL_PDMA_XY_PKT(0x7102),
128	PSIL_PDMA_XY_PKT(0x7103),
129	/* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
130	PSIL_PDMA_XY_PKT(0x7200),
131	PSIL_PDMA_XY_PKT(0x7201),
132	PSIL_PDMA_XY_PKT(0x7202),
133	PSIL_PDMA_XY_PKT(0x7203),
134	PSIL_PDMA_XY_PKT(0x7204),
135	PSIL_PDMA_XY_PKT(0x7205),
136	PSIL_PDMA_XY_PKT(0x7206),
137	PSIL_PDMA_XY_PKT(0x7207),
138	/* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
139	PSIL_PDMA_XY_PKT(0x7300),
140	/* MCU_PDMA_ADC - ADC0-1 */
141	PSIL_PDMA_XY_TR(0x7400),
142	PSIL_PDMA_XY_TR(0x7401),
143	PSIL_PDMA_XY_TR(0x7402),
144	PSIL_PDMA_XY_TR(0x7403),
145	/* SA2UL */
146	PSIL_SA2UL(0x7500, 0),
147	PSIL_SA2UL(0x7501, 0),
148	PSIL_SA2UL(0x7502, 0),
149	PSIL_SA2UL(0x7503, 0),
150};
151
152/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
153static struct psil_ep j721s2_dst_ep_map[] = {
154	/* MAIN SA2UL */
155	PSIL_SA2UL(0xca40, 1),
156	PSIL_SA2UL(0xca41, 1),
157	/* CPSW0 */
158	PSIL_ETHERNET(0xf000),
159	PSIL_ETHERNET(0xf001),
160	PSIL_ETHERNET(0xf002),
161	PSIL_ETHERNET(0xf003),
162	PSIL_ETHERNET(0xf004),
163	PSIL_ETHERNET(0xf005),
164	PSIL_ETHERNET(0xf006),
165	PSIL_ETHERNET(0xf007),
166	/* MAIN_CPSW2G */
167	PSIL_ETHERNET(0xc640),
168	PSIL_ETHERNET(0xc641),
169	PSIL_ETHERNET(0xc642),
170	PSIL_ETHERNET(0xc643),
171	PSIL_ETHERNET(0xc644),
172	PSIL_ETHERNET(0xc645),
173	PSIL_ETHERNET(0xc646),
174	PSIL_ETHERNET(0xc647),
175	/* SA2UL */
176	PSIL_SA2UL(0xf500, 1),
177	PSIL_SA2UL(0xf501, 1),
178};
179
180struct psil_ep_map j721s2_ep_map = {
181	.name = "j721s2",
182	.src = j721s2_src_ep_map,
183	.src_count = ARRAY_SIZE(j721s2_src_ep_map),
184	.dst = j721s2_dst_ep_map,
185	.dst_count = ARRAY_SIZE(j721s2_dst_ep_map),
186};
187