162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Driver for the Synopsys DesignWare DMA Controller 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2013 Intel Corporation 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#ifndef _DMA_DW_INTERNAL_H 962306a36Sopenharmony_ci#define _DMA_DW_INTERNAL_H 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/dma/dw.h> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include "regs.h" 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciint do_dma_probe(struct dw_dma_chip *chip); 1662306a36Sopenharmony_ciint do_dma_remove(struct dw_dma_chip *chip); 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_civoid do_dw_dma_on(struct dw_dma *dw); 1962306a36Sopenharmony_civoid do_dw_dma_off(struct dw_dma *dw); 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciint do_dw_dma_disable(struct dw_dma_chip *chip); 2262306a36Sopenharmony_ciint do_dw_dma_enable(struct dw_dma_chip *chip); 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ciextern bool dw_dma_filter(struct dma_chan *chan, void *param); 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#ifdef CONFIG_ACPI 2762306a36Sopenharmony_civoid dw_dma_acpi_controller_register(struct dw_dma *dw); 2862306a36Sopenharmony_civoid dw_dma_acpi_controller_free(struct dw_dma *dw); 2962306a36Sopenharmony_ci#else /* !CONFIG_ACPI */ 3062306a36Sopenharmony_cistatic inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} 3162306a36Sopenharmony_cistatic inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} 3262306a36Sopenharmony_ci#endif /* !CONFIG_ACPI */ 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_cistruct platform_device; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci#ifdef CONFIG_OF 3762306a36Sopenharmony_cistruct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev); 3862306a36Sopenharmony_civoid dw_dma_of_controller_register(struct dw_dma *dw); 3962306a36Sopenharmony_civoid dw_dma_of_controller_free(struct dw_dma *dw); 4062306a36Sopenharmony_ci#else 4162306a36Sopenharmony_cistatic inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev) 4262306a36Sopenharmony_ci{ 4362306a36Sopenharmony_ci return NULL; 4462306a36Sopenharmony_ci} 4562306a36Sopenharmony_cistatic inline void dw_dma_of_controller_register(struct dw_dma *dw) {} 4662306a36Sopenharmony_cistatic inline void dw_dma_of_controller_free(struct dw_dma *dw) {} 4762306a36Sopenharmony_ci#endif 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_cistruct dw_dma_chip_pdata { 5062306a36Sopenharmony_ci const struct dw_dma_platform_data *pdata; 5162306a36Sopenharmony_ci int (*probe)(struct dw_dma_chip *chip); 5262306a36Sopenharmony_ci int (*remove)(struct dw_dma_chip *chip); 5362306a36Sopenharmony_ci struct dw_dma_chip *chip; 5462306a36Sopenharmony_ci}; 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_cistatic __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = { 5762306a36Sopenharmony_ci .probe = dw_dma_probe, 5862306a36Sopenharmony_ci .remove = dw_dma_remove, 5962306a36Sopenharmony_ci}; 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_cistatic const struct dw_dma_platform_data idma32_pdata = { 6262306a36Sopenharmony_ci .nr_channels = 8, 6362306a36Sopenharmony_ci .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 6462306a36Sopenharmony_ci .chan_priority = CHAN_PRIORITY_ASCENDING, 6562306a36Sopenharmony_ci .block_size = 131071, 6662306a36Sopenharmony_ci .nr_masters = 1, 6762306a36Sopenharmony_ci .data_width = {4}, 6862306a36Sopenharmony_ci .multi_block = {1, 1, 1, 1, 1, 1, 1, 1}, 6962306a36Sopenharmony_ci}; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_cistatic __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = { 7262306a36Sopenharmony_ci .pdata = &idma32_pdata, 7362306a36Sopenharmony_ci .probe = idma32_dma_probe, 7462306a36Sopenharmony_ci .remove = idma32_dma_remove, 7562306a36Sopenharmony_ci}; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_cistatic const struct dw_dma_platform_data xbar_pdata = { 7862306a36Sopenharmony_ci .nr_channels = 8, 7962306a36Sopenharmony_ci .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 8062306a36Sopenharmony_ci .chan_priority = CHAN_PRIORITY_ASCENDING, 8162306a36Sopenharmony_ci .block_size = 131071, 8262306a36Sopenharmony_ci .nr_masters = 1, 8362306a36Sopenharmony_ci .data_width = {4}, 8462306a36Sopenharmony_ci .quirks = DW_DMA_QUIRK_XBAR_PRESENT, 8562306a36Sopenharmony_ci}; 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cistatic __maybe_unused const struct dw_dma_chip_pdata xbar_chip_pdata = { 8862306a36Sopenharmony_ci .pdata = &xbar_pdata, 8962306a36Sopenharmony_ci .probe = idma32_dma_probe, 9062306a36Sopenharmony_ci .remove = idma32_dma_remove, 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci#endif /* _DMA_DW_INTERNAL_H */ 94