162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci * Copyright (C) 2020 Marvell. 362306a36Sopenharmony_ci */ 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#ifndef __OTX2_CPTVF_H 662306a36Sopenharmony_ci#define __OTX2_CPTVF_H 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include "mbox.h" 962306a36Sopenharmony_ci#include "otx2_cptlf.h" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_cistruct otx2_cptvf_dev { 1262306a36Sopenharmony_ci void __iomem *reg_base; /* Register start address */ 1362306a36Sopenharmony_ci void __iomem *pfvf_mbox_base; /* PF-VF mbox start address */ 1462306a36Sopenharmony_ci struct pci_dev *pdev; /* PCI device handle */ 1562306a36Sopenharmony_ci struct otx2_cptlfs_info lfs; /* CPT LFs attached to this VF */ 1662306a36Sopenharmony_ci u8 vf_id; /* Virtual function index */ 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci /* PF <=> VF mbox */ 1962306a36Sopenharmony_ci struct otx2_mbox pfvf_mbox; 2062306a36Sopenharmony_ci struct work_struct pfvf_mbox_work; 2162306a36Sopenharmony_ci struct workqueue_struct *pfvf_mbox_wq; 2262306a36Sopenharmony_ci int blkaddr; 2362306a36Sopenharmony_ci void *bbuf_base; 2462306a36Sopenharmony_ci unsigned long cap_flag; 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ciirqreturn_t otx2_cptvf_pfvf_mbox_intr(int irq, void *arg); 2862306a36Sopenharmony_civoid otx2_cptvf_pfvf_mbox_handler(struct work_struct *work); 2962306a36Sopenharmony_ciint otx2_cptvf_send_eng_grp_num_msg(struct otx2_cptvf_dev *cptvf, int eng_type); 3062306a36Sopenharmony_ciint otx2_cptvf_send_kvf_limits_msg(struct otx2_cptvf_dev *cptvf); 3162306a36Sopenharmony_ciint otx2_cpt_mbox_bbuf_init(struct otx2_cptvf_dev *cptvf, struct pci_dev *pdev); 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci#endif /* __OTX2_CPTVF_H */ 34