162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci * Copyright (C) 2020 Marvell. 362306a36Sopenharmony_ci */ 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#ifndef __OTX2_CPTPF_H 662306a36Sopenharmony_ci#define __OTX2_CPTPF_H 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include "otx2_cpt_common.h" 962306a36Sopenharmony_ci#include "otx2_cptpf_ucode.h" 1062306a36Sopenharmony_ci#include "otx2_cptlf.h" 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cistruct otx2_cptpf_dev; 1362306a36Sopenharmony_cistruct otx2_cptvf_info { 1462306a36Sopenharmony_ci struct otx2_cptpf_dev *cptpf; /* PF pointer this VF belongs to */ 1562306a36Sopenharmony_ci struct work_struct vfpf_mbox_work; 1662306a36Sopenharmony_ci struct pci_dev *vf_dev; 1762306a36Sopenharmony_ci int vf_id; 1862306a36Sopenharmony_ci int intr_idx; 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistruct cptpf_flr_work { 2262306a36Sopenharmony_ci struct work_struct work; 2362306a36Sopenharmony_ci struct otx2_cptpf_dev *pf; 2462306a36Sopenharmony_ci}; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_cistruct otx2_cptpf_dev { 2762306a36Sopenharmony_ci void __iomem *reg_base; /* CPT PF registers start address */ 2862306a36Sopenharmony_ci void __iomem *afpf_mbox_base; /* PF-AF mbox start address */ 2962306a36Sopenharmony_ci void __iomem *vfpf_mbox_base; /* VF-PF mbox start address */ 3062306a36Sopenharmony_ci struct pci_dev *pdev; /* PCI device handle */ 3162306a36Sopenharmony_ci struct otx2_cptvf_info vf[OTX2_CPT_MAX_VFS_NUM]; 3262306a36Sopenharmony_ci struct otx2_cpt_eng_grps eng_grps;/* Engine groups information */ 3362306a36Sopenharmony_ci struct otx2_cptlfs_info lfs; /* CPT LFs attached to this PF */ 3462306a36Sopenharmony_ci struct otx2_cptlfs_info cpt1_lfs; /* CPT1 LFs attached to this PF */ 3562306a36Sopenharmony_ci /* HW capabilities for each engine type */ 3662306a36Sopenharmony_ci union otx2_cpt_eng_caps eng_caps[OTX2_CPT_MAX_ENG_TYPES]; 3762306a36Sopenharmony_ci bool is_eng_caps_discovered; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci /* AF <=> PF mbox */ 4062306a36Sopenharmony_ci struct otx2_mbox afpf_mbox; 4162306a36Sopenharmony_ci struct work_struct afpf_mbox_work; 4262306a36Sopenharmony_ci struct workqueue_struct *afpf_mbox_wq; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci struct otx2_mbox afpf_mbox_up; 4562306a36Sopenharmony_ci struct work_struct afpf_mbox_up_work; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci /* VF <=> PF mbox */ 4862306a36Sopenharmony_ci struct otx2_mbox vfpf_mbox; 4962306a36Sopenharmony_ci struct workqueue_struct *vfpf_mbox_wq; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci struct workqueue_struct *flr_wq; 5262306a36Sopenharmony_ci struct cptpf_flr_work *flr_work; 5362306a36Sopenharmony_ci struct mutex lock; /* serialize mailbox access */ 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci unsigned long cap_flag; 5662306a36Sopenharmony_ci u8 pf_id; /* RVU PF number */ 5762306a36Sopenharmony_ci u8 max_vfs; /* Maximum number of VFs supported by CPT */ 5862306a36Sopenharmony_ci u8 enabled_vfs; /* Number of enabled VFs */ 5962306a36Sopenharmony_ci u8 sso_pf_func_ovrd; /* SSO PF_FUNC override bit */ 6062306a36Sopenharmony_ci u8 kvf_limits; /* Kernel crypto limits */ 6162306a36Sopenharmony_ci bool has_cpt1; 6262306a36Sopenharmony_ci u8 rsrc_req_blkaddr; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci /* Devlink */ 6562306a36Sopenharmony_ci struct devlink *dl; 6662306a36Sopenharmony_ci}; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ciirqreturn_t otx2_cptpf_afpf_mbox_intr(int irq, void *arg); 6962306a36Sopenharmony_civoid otx2_cptpf_afpf_mbox_handler(struct work_struct *work); 7062306a36Sopenharmony_civoid otx2_cptpf_afpf_mbox_up_handler(struct work_struct *work); 7162306a36Sopenharmony_ciirqreturn_t otx2_cptpf_vfpf_mbox_intr(int irq, void *arg); 7262306a36Sopenharmony_civoid otx2_cptpf_vfpf_mbox_handler(struct work_struct *work); 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci#endif /* __OTX2_CPTPF_H */ 75