162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci * Marvell OcteonTX CPT driver 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2019 Marvell International Ltd. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * This program is free software; you can redistribute it and/or modify 762306a36Sopenharmony_ci * it under the terms of the GNU General Public License version 2 as 862306a36Sopenharmony_ci * published by the Free Software Foundation. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#ifndef __OTX_CPTPF_H 1262306a36Sopenharmony_ci#define __OTX_CPTPF_H 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#include <linux/types.h> 1562306a36Sopenharmony_ci#include <linux/device.h> 1662306a36Sopenharmony_ci#include "otx_cptpf_ucode.h" 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* 1962306a36Sopenharmony_ci * OcteonTX CPT device structure 2062306a36Sopenharmony_ci */ 2162306a36Sopenharmony_cistruct otx_cpt_device { 2262306a36Sopenharmony_ci void __iomem *reg_base; /* Register start address */ 2362306a36Sopenharmony_ci struct pci_dev *pdev; /* Pci device handle */ 2462306a36Sopenharmony_ci struct otx_cpt_eng_grps eng_grps;/* Engine groups information */ 2562306a36Sopenharmony_ci struct list_head list; 2662306a36Sopenharmony_ci u8 pf_type; /* PF type SE or AE */ 2762306a36Sopenharmony_ci u8 max_vfs; /* Maximum number of VFs supported by the CPT */ 2862306a36Sopenharmony_ci u8 vfs_enabled; /* Number of enabled VFs */ 2962306a36Sopenharmony_ci}; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_civoid otx_cpt_mbox_intr_handler(struct otx_cpt_device *cpt, int mbx); 3262306a36Sopenharmony_civoid otx_cpt_disable_all_cores(struct otx_cpt_device *cpt); 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci#endif /* __OTX_CPTPF_H */ 35