162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *	elanfreq:	cpufreq driver for the AMD ELAN family
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci *	(c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de>
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci *	Parts of this code are (c) Sven Geggus <sven@geggus.net>
862306a36Sopenharmony_ci *
962306a36Sopenharmony_ci *      All Rights Reserved.
1062306a36Sopenharmony_ci *
1162306a36Sopenharmony_ci *	2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel
1262306a36Sopenharmony_ci */
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#include <linux/kernel.h>
1762306a36Sopenharmony_ci#include <linux/module.h>
1862306a36Sopenharmony_ci#include <linux/init.h>
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci#include <linux/delay.h>
2162306a36Sopenharmony_ci#include <linux/cpufreq.h>
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci#include <asm/cpu_device_id.h>
2462306a36Sopenharmony_ci#include <asm/msr.h>
2562306a36Sopenharmony_ci#include <linux/timex.h>
2662306a36Sopenharmony_ci#include <linux/io.h>
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define REG_CSCIR 0x22		/* Chip Setup and Control Index Register    */
2962306a36Sopenharmony_ci#define REG_CSCDR 0x23		/* Chip Setup and Control Data  Register    */
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci/* Module parameter */
3262306a36Sopenharmony_cistatic int max_freq;
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_cistruct s_elan_multiplier {
3562306a36Sopenharmony_ci	int clock;		/* frequency in kHz                         */
3662306a36Sopenharmony_ci	int val40h;		/* PMU Force Mode register                  */
3762306a36Sopenharmony_ci	int val80h;		/* CPU Clock Speed Register                 */
3862306a36Sopenharmony_ci};
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci/*
4162306a36Sopenharmony_ci * It is important that the frequencies
4262306a36Sopenharmony_ci * are listed in ascending order here!
4362306a36Sopenharmony_ci */
4462306a36Sopenharmony_cistatic struct s_elan_multiplier elan_multiplier[] = {
4562306a36Sopenharmony_ci	{1000,	0x02,	0x18},
4662306a36Sopenharmony_ci	{2000,	0x02,	0x10},
4762306a36Sopenharmony_ci	{4000,	0x02,	0x08},
4862306a36Sopenharmony_ci	{8000,	0x00,	0x00},
4962306a36Sopenharmony_ci	{16000,	0x00,	0x02},
5062306a36Sopenharmony_ci	{33000,	0x00,	0x04},
5162306a36Sopenharmony_ci	{66000,	0x01,	0x04},
5262306a36Sopenharmony_ci	{99000,	0x01,	0x05}
5362306a36Sopenharmony_ci};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_cistatic struct cpufreq_frequency_table elanfreq_table[] = {
5662306a36Sopenharmony_ci	{0, 0,	1000},
5762306a36Sopenharmony_ci	{0, 1,	2000},
5862306a36Sopenharmony_ci	{0, 2,	4000},
5962306a36Sopenharmony_ci	{0, 3,	8000},
6062306a36Sopenharmony_ci	{0, 4,	16000},
6162306a36Sopenharmony_ci	{0, 5,	33000},
6262306a36Sopenharmony_ci	{0, 6,	66000},
6362306a36Sopenharmony_ci	{0, 7,	99000},
6462306a36Sopenharmony_ci	{0, 0,	CPUFREQ_TABLE_END},
6562306a36Sopenharmony_ci};
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci/**
6962306a36Sopenharmony_ci *	elanfreq_get_cpu_frequency: determine current cpu speed
7062306a36Sopenharmony_ci *
7162306a36Sopenharmony_ci *	Finds out at which frequency the CPU of the Elan SOC runs
7262306a36Sopenharmony_ci *	at the moment. Frequencies from 1 to 33 MHz are generated
7362306a36Sopenharmony_ci *	the normal way, 66 and 99 MHz are called "Hyperspeed Mode"
7462306a36Sopenharmony_ci *	and have the rest of the chip running with 33 MHz.
7562306a36Sopenharmony_ci */
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_cistatic unsigned int elanfreq_get_cpu_frequency(unsigned int cpu)
7862306a36Sopenharmony_ci{
7962306a36Sopenharmony_ci	u8 clockspeed_reg;    /* Clock Speed Register */
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci	local_irq_disable();
8262306a36Sopenharmony_ci	outb_p(0x80, REG_CSCIR);
8362306a36Sopenharmony_ci	clockspeed_reg = inb_p(REG_CSCDR);
8462306a36Sopenharmony_ci	local_irq_enable();
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ci	if ((clockspeed_reg & 0xE0) == 0xE0)
8762306a36Sopenharmony_ci		return 0;
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci	/* Are we in CPU clock multiplied mode (66/99 MHz)? */
9062306a36Sopenharmony_ci	if ((clockspeed_reg & 0xE0) == 0xC0) {
9162306a36Sopenharmony_ci		if ((clockspeed_reg & 0x01) == 0)
9262306a36Sopenharmony_ci			return 66000;
9362306a36Sopenharmony_ci		else
9462306a36Sopenharmony_ci			return 99000;
9562306a36Sopenharmony_ci	}
9662306a36Sopenharmony_ci
9762306a36Sopenharmony_ci	/* 33 MHz is not 32 MHz... */
9862306a36Sopenharmony_ci	if ((clockspeed_reg & 0xE0) == 0xA0)
9962306a36Sopenharmony_ci		return 33000;
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci	return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000;
10262306a36Sopenharmony_ci}
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_cistatic int elanfreq_target(struct cpufreq_policy *policy,
10662306a36Sopenharmony_ci			    unsigned int state)
10762306a36Sopenharmony_ci{
10862306a36Sopenharmony_ci	/*
10962306a36Sopenharmony_ci	 * Access to the Elan's internal registers is indexed via
11062306a36Sopenharmony_ci	 * 0x22: Chip Setup & Control Register Index Register (CSCI)
11162306a36Sopenharmony_ci	 * 0x23: Chip Setup & Control Register Data  Register (CSCD)
11262306a36Sopenharmony_ci	 *
11362306a36Sopenharmony_ci	 */
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci	/*
11662306a36Sopenharmony_ci	 * 0x40 is the Power Management Unit's Force Mode Register.
11762306a36Sopenharmony_ci	 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
11862306a36Sopenharmony_ci	 */
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci	local_irq_disable();
12162306a36Sopenharmony_ci	outb_p(0x40, REG_CSCIR);		/* Disable hyperspeed mode */
12262306a36Sopenharmony_ci	outb_p(0x00, REG_CSCDR);
12362306a36Sopenharmony_ci	local_irq_enable();		/* wait till internal pipelines and */
12462306a36Sopenharmony_ci	udelay(1000);			/* buffers have cleaned up          */
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci	local_irq_disable();
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ci	/* now, set the CPU clock speed register (0x80) */
12962306a36Sopenharmony_ci	outb_p(0x80, REG_CSCIR);
13062306a36Sopenharmony_ci	outb_p(elan_multiplier[state].val80h, REG_CSCDR);
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci	/* now, the hyperspeed bit in PMU Force Mode Register (0x40) */
13362306a36Sopenharmony_ci	outb_p(0x40, REG_CSCIR);
13462306a36Sopenharmony_ci	outb_p(elan_multiplier[state].val40h, REG_CSCDR);
13562306a36Sopenharmony_ci	udelay(10000);
13662306a36Sopenharmony_ci	local_irq_enable();
13762306a36Sopenharmony_ci
13862306a36Sopenharmony_ci	return 0;
13962306a36Sopenharmony_ci}
14062306a36Sopenharmony_ci/*
14162306a36Sopenharmony_ci *	Module init and exit code
14262306a36Sopenharmony_ci */
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_cistatic int elanfreq_cpu_init(struct cpufreq_policy *policy)
14562306a36Sopenharmony_ci{
14662306a36Sopenharmony_ci	struct cpuinfo_x86 *c = &cpu_data(0);
14762306a36Sopenharmony_ci	struct cpufreq_frequency_table *pos;
14862306a36Sopenharmony_ci
14962306a36Sopenharmony_ci	/* capability check */
15062306a36Sopenharmony_ci	if ((c->x86_vendor != X86_VENDOR_AMD) ||
15162306a36Sopenharmony_ci	    (c->x86 != 4) || (c->x86_model != 10))
15262306a36Sopenharmony_ci		return -ENODEV;
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci	/* max freq */
15562306a36Sopenharmony_ci	if (!max_freq)
15662306a36Sopenharmony_ci		max_freq = elanfreq_get_cpu_frequency(0);
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_ci	/* table init */
15962306a36Sopenharmony_ci	cpufreq_for_each_entry(pos, elanfreq_table)
16062306a36Sopenharmony_ci		if (pos->frequency > max_freq)
16162306a36Sopenharmony_ci			pos->frequency = CPUFREQ_ENTRY_INVALID;
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci	policy->freq_table = elanfreq_table;
16462306a36Sopenharmony_ci	return 0;
16562306a36Sopenharmony_ci}
16662306a36Sopenharmony_ci
16762306a36Sopenharmony_ci
16862306a36Sopenharmony_ci#ifndef MODULE
16962306a36Sopenharmony_ci/**
17062306a36Sopenharmony_ci * elanfreq_setup - elanfreq command line parameter parsing
17162306a36Sopenharmony_ci *
17262306a36Sopenharmony_ci * elanfreq command line parameter.  Use:
17362306a36Sopenharmony_ci *  elanfreq=66000
17462306a36Sopenharmony_ci * to set the maximum CPU frequency to 66 MHz. Note that in
17562306a36Sopenharmony_ci * case you do not give this boot parameter, the maximum
17662306a36Sopenharmony_ci * frequency will fall back to _current_ CPU frequency which
17762306a36Sopenharmony_ci * might be lower. If you build this as a module, use the
17862306a36Sopenharmony_ci * max_freq module parameter instead.
17962306a36Sopenharmony_ci */
18062306a36Sopenharmony_cistatic int __init elanfreq_setup(char *str)
18162306a36Sopenharmony_ci{
18262306a36Sopenharmony_ci	max_freq = simple_strtoul(str, &str, 0);
18362306a36Sopenharmony_ci	pr_warn("You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n");
18462306a36Sopenharmony_ci	return 1;
18562306a36Sopenharmony_ci}
18662306a36Sopenharmony_ci__setup("elanfreq=", elanfreq_setup);
18762306a36Sopenharmony_ci#endif
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci
19062306a36Sopenharmony_cistatic struct cpufreq_driver elanfreq_driver = {
19162306a36Sopenharmony_ci	.get		= elanfreq_get_cpu_frequency,
19262306a36Sopenharmony_ci	.flags		= CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
19362306a36Sopenharmony_ci	.verify		= cpufreq_generic_frequency_table_verify,
19462306a36Sopenharmony_ci	.target_index	= elanfreq_target,
19562306a36Sopenharmony_ci	.init		= elanfreq_cpu_init,
19662306a36Sopenharmony_ci	.name		= "elanfreq",
19762306a36Sopenharmony_ci	.attr		= cpufreq_generic_attr,
19862306a36Sopenharmony_ci};
19962306a36Sopenharmony_ci
20062306a36Sopenharmony_cistatic const struct x86_cpu_id elan_id[] = {
20162306a36Sopenharmony_ci	X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 10, NULL),
20262306a36Sopenharmony_ci	{}
20362306a36Sopenharmony_ci};
20462306a36Sopenharmony_ciMODULE_DEVICE_TABLE(x86cpu, elan_id);
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_cistatic int __init elanfreq_init(void)
20762306a36Sopenharmony_ci{
20862306a36Sopenharmony_ci	if (!x86_match_cpu(elan_id))
20962306a36Sopenharmony_ci		return -ENODEV;
21062306a36Sopenharmony_ci	return cpufreq_register_driver(&elanfreq_driver);
21162306a36Sopenharmony_ci}
21262306a36Sopenharmony_ci
21362306a36Sopenharmony_ci
21462306a36Sopenharmony_cistatic void __exit elanfreq_exit(void)
21562306a36Sopenharmony_ci{
21662306a36Sopenharmony_ci	cpufreq_unregister_driver(&elanfreq_driver);
21762306a36Sopenharmony_ci}
21862306a36Sopenharmony_ci
21962306a36Sopenharmony_ci
22062306a36Sopenharmony_cimodule_param(max_freq, int, 0444);
22162306a36Sopenharmony_ci
22262306a36Sopenharmony_ciMODULE_LICENSE("GPL");
22362306a36Sopenharmony_ciMODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
22462306a36Sopenharmony_ci		"Sven Geggus <sven@geggus.net>");
22562306a36Sopenharmony_ciMODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
22662306a36Sopenharmony_ci
22762306a36Sopenharmony_cimodule_init(elanfreq_init);
22862306a36Sopenharmony_cimodule_exit(elanfreq_exit);
229