162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci#ifndef __RESET_PRCC_H 462306a36Sopenharmony_ci#define __RESET_PRCC_H 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#include <linux/reset-controller.h> 762306a36Sopenharmony_ci#include <linux/io.h> 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/** 1062306a36Sopenharmony_ci * struct u8500_prcc_reset - U8500 PRCC reset controller state 1162306a36Sopenharmony_ci * @rcdev: reset controller device 1262306a36Sopenharmony_ci * @phy_base: the physical base address for each PRCC block 1362306a36Sopenharmony_ci * @base: the remapped PRCC bases 1462306a36Sopenharmony_ci */ 1562306a36Sopenharmony_cistruct u8500_prcc_reset { 1662306a36Sopenharmony_ci struct reset_controller_dev rcdev; 1762306a36Sopenharmony_ci u32 phy_base[CLKRST_MAX]; 1862306a36Sopenharmony_ci void __iomem *base[CLKRST_MAX]; 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_civoid u8500_prcc_reset_init(struct device_node *np, struct u8500_prcc_reset *ur); 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci#endif 24