162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2017 Icenowy Zheng <icenowy@aosc.io> 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef _CCU_SUN8I_R40_H_ 762306a36Sopenharmony_ci#define _CCU_SUN8I_R40_H_ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <dt-bindings/clock/sun8i-r40-ccu.h> 1062306a36Sopenharmony_ci#include <dt-bindings/reset/sun8i-r40-ccu.h> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#define CLK_OSC_12M 0 1362306a36Sopenharmony_ci#define CLK_PLL_CPU 1 1462306a36Sopenharmony_ci#define CLK_PLL_AUDIO_BASE 2 1562306a36Sopenharmony_ci#define CLK_PLL_AUDIO 3 1662306a36Sopenharmony_ci#define CLK_PLL_AUDIO_2X 4 1762306a36Sopenharmony_ci#define CLK_PLL_AUDIO_4X 5 1862306a36Sopenharmony_ci#define CLK_PLL_AUDIO_8X 6 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* PLL_VIDEO0 is exported */ 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#define CLK_PLL_VIDEO0_2X 8 2362306a36Sopenharmony_ci#define CLK_PLL_VE 9 2462306a36Sopenharmony_ci#define CLK_PLL_DDR0 10 2562306a36Sopenharmony_ci#define CLK_PLL_PERIPH0 11 2662306a36Sopenharmony_ci#define CLK_PLL_PERIPH0_SATA 12 2762306a36Sopenharmony_ci#define CLK_PLL_PERIPH0_2X 13 2862306a36Sopenharmony_ci#define CLK_PLL_PERIPH1 14 2962306a36Sopenharmony_ci#define CLK_PLL_PERIPH1_2X 15 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci/* PLL_VIDEO1 is exported */ 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci#define CLK_PLL_VIDEO1_2X 17 3462306a36Sopenharmony_ci#define CLK_PLL_SATA 18 3562306a36Sopenharmony_ci#define CLK_PLL_SATA_OUT 19 3662306a36Sopenharmony_ci#define CLK_PLL_GPU 20 3762306a36Sopenharmony_ci#define CLK_PLL_MIPI 21 3862306a36Sopenharmony_ci#define CLK_PLL_DE 22 3962306a36Sopenharmony_ci#define CLK_PLL_DDR1 23 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci/* The CPU clock is exported */ 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#define CLK_AXI 25 4462306a36Sopenharmony_ci#define CLK_AHB1 26 4562306a36Sopenharmony_ci#define CLK_APB1 27 4662306a36Sopenharmony_ci#define CLK_APB2 28 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci/* All the bus gates are exported */ 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci/* The first bunch of module clocks are exported */ 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci#define CLK_DRAM 132 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci/* All the DRAM gates are exported */ 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci/* Some more module clocks are exported */ 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci#define CLK_NUMBER (CLK_OUTB + 1) 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci#endif /* _CCU_SUN8I_R40_H_ */ 61