162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright 2016 Chen-Yu Tsai
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Chen-Yu Tsai <wens@csie.org>
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#ifndef _CCU_SUN6I_A31_H_
962306a36Sopenharmony_ci#define _CCU_SUN6I_A31_H_
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include <dt-bindings/clock/sun6i-a31-ccu.h>
1262306a36Sopenharmony_ci#include <dt-bindings/reset/sun6i-a31-ccu.h>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#define CLK_PLL_CPU		0
1562306a36Sopenharmony_ci#define CLK_PLL_AUDIO_BASE	1
1662306a36Sopenharmony_ci#define CLK_PLL_AUDIO		2
1762306a36Sopenharmony_ci#define CLK_PLL_AUDIO_2X	3
1862306a36Sopenharmony_ci#define CLK_PLL_AUDIO_4X	4
1962306a36Sopenharmony_ci#define CLK_PLL_AUDIO_8X	5
2062306a36Sopenharmony_ci#define CLK_PLL_VIDEO0		6
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci/* The PLL_VIDEO0_2X clock is exported */
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci#define CLK_PLL_VE		8
2562306a36Sopenharmony_ci#define CLK_PLL_DDR		9
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci/* The PLL_PERIPH clock is exported */
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci#define CLK_PLL_PERIPH_2X	11
3062306a36Sopenharmony_ci#define CLK_PLL_VIDEO1		12
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci/* The PLL_VIDEO1_2X clock is exported */
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci#define CLK_PLL_GPU		14
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci/* The PLL_VIDEO1_2X clock is exported */
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci#define CLK_PLL9		16
3962306a36Sopenharmony_ci#define CLK_PLL10		17
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci/* The CPUX clock is exported */
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci#define CLK_AXI			19
4462306a36Sopenharmony_ci#define CLK_AHB1		20
4562306a36Sopenharmony_ci#define CLK_APB1		21
4662306a36Sopenharmony_ci#define CLK_APB2		22
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci/* All the bus gates are exported */
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci/* The first bunch of module clocks are exported */
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci/* EMAC clock is not implemented */
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci#define CLK_MDFS		107
5562306a36Sopenharmony_ci#define CLK_SDRAM0		108
5662306a36Sopenharmony_ci#define CLK_SDRAM1		109
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci/* All the DRAM gates are exported */
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci/* Some more module clocks are exported */
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci#define CLK_MBUS0		141
6362306a36Sopenharmony_ci#define CLK_MBUS1		142
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci/* Some more module clocks and external clock outputs are exported */
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci#define CLK_NUMBER		(CLK_OUT_C + 1)
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci#endif /* _CCU_SUN6I_A31_H_ */
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