162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci#ifndef __CLK_EXYNOS5_SUBCMU_H 462306a36Sopenharmony_ci#define __CLK_EXYNOS5_SUBCMU_H 562306a36Sopenharmony_ci 662306a36Sopenharmony_cistruct exynos5_subcmu_reg_dump { 762306a36Sopenharmony_ci u32 offset; 862306a36Sopenharmony_ci u32 value; 962306a36Sopenharmony_ci u32 mask; 1062306a36Sopenharmony_ci u32 save; 1162306a36Sopenharmony_ci}; 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cistruct exynos5_subcmu_info { 1462306a36Sopenharmony_ci const struct samsung_div_clock *div_clks; 1562306a36Sopenharmony_ci unsigned int nr_div_clks; 1662306a36Sopenharmony_ci const struct samsung_gate_clock *gate_clks; 1762306a36Sopenharmony_ci unsigned int nr_gate_clks; 1862306a36Sopenharmony_ci struct exynos5_subcmu_reg_dump *suspend_regs; 1962306a36Sopenharmony_ci unsigned int nr_suspend_regs; 2062306a36Sopenharmony_ci const char *pd_name; 2162306a36Sopenharmony_ci}; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_civoid exynos5_subcmus_init(struct samsung_clk_provider *ctx, int nr_cmus, 2462306a36Sopenharmony_ci const struct exynos5_subcmu_info **cmu); 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#endif 27