162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci#
362306a36Sopenharmony_ci# Rockchip Clock specific Makefile
462306a36Sopenharmony_ci#
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciobj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
762306a36Sopenharmony_ci
862306a36Sopenharmony_ciclk-rockchip-y += clk.o
962306a36Sopenharmony_ciclk-rockchip-y += clk-pll.o
1062306a36Sopenharmony_ciclk-rockchip-y += clk-cpu.o
1162306a36Sopenharmony_ciclk-rockchip-y += clk-half-divider.o
1262306a36Sopenharmony_ciclk-rockchip-y += clk-inverter.o
1362306a36Sopenharmony_ciclk-rockchip-y += clk-mmc-phase.o
1462306a36Sopenharmony_ciclk-rockchip-y += clk-muxgrf.o
1562306a36Sopenharmony_ciclk-rockchip-y += clk-ddr.o
1662306a36Sopenharmony_ciclk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciobj-$(CONFIG_CLK_PX30)          += clk-px30.o
1962306a36Sopenharmony_ciobj-$(CONFIG_CLK_RV110X)        += clk-rv1108.o
2062306a36Sopenharmony_ciobj-$(CONFIG_CLK_RV1126)        += clk-rv1126.o
2162306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3036)        += clk-rk3036.o
2262306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK312X)        += clk-rk3128.o
2362306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3188)        += clk-rk3188.o
2462306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK322X)        += clk-rk3228.o
2562306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3288)        += clk-rk3288.o
2662306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3308)        += clk-rk3308.o
2762306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3328)        += clk-rk3328.o
2862306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3368)        += clk-rk3368.o
2962306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3399)        += clk-rk3399.o
3062306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3568)	+= clk-rk3568.o
3162306a36Sopenharmony_ciobj-$(CONFIG_CLK_RK3588)	+= clk-rk3588.o rst-rk3588.o
32