162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci// Copyright (c) 2018, The Linux Foundation. All rights reserved. 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci#include <linux/kernel.h> 562306a36Sopenharmony_ci#include <linux/init.h> 662306a36Sopenharmony_ci#include <linux/module.h> 762306a36Sopenharmony_ci#include <linux/platform_device.h> 862306a36Sopenharmony_ci#include <linux/of.h> 962306a36Sopenharmony_ci#include <linux/clk.h> 1062306a36Sopenharmony_ci#include <linux/clk-provider.h> 1162306a36Sopenharmony_ci#include <linux/regmap.h> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include "clk-regmap.h" 1462306a36Sopenharmony_ci#include "clk-hfpll.h" 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_cistatic const struct hfpll_data hdata = { 1762306a36Sopenharmony_ci .mode_reg = 0x00, 1862306a36Sopenharmony_ci .l_reg = 0x04, 1962306a36Sopenharmony_ci .m_reg = 0x08, 2062306a36Sopenharmony_ci .n_reg = 0x0c, 2162306a36Sopenharmony_ci .user_reg = 0x10, 2262306a36Sopenharmony_ci .config_reg = 0x14, 2362306a36Sopenharmony_ci .config_val = 0x430405d, 2462306a36Sopenharmony_ci .status_reg = 0x1c, 2562306a36Sopenharmony_ci .lock_bit = 16, 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci .user_val = 0x8, 2862306a36Sopenharmony_ci .user_vco_mask = 0x100000, 2962306a36Sopenharmony_ci .low_vco_max_rate = 1248000000, 3062306a36Sopenharmony_ci .min_rate = 537600000UL, 3162306a36Sopenharmony_ci .max_rate = 2900000000UL, 3262306a36Sopenharmony_ci}; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_cistatic const struct of_device_id qcom_hfpll_match_table[] = { 3562306a36Sopenharmony_ci { .compatible = "qcom,hfpll" }, 3662306a36Sopenharmony_ci { } 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, qcom_hfpll_match_table); 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cistatic const struct regmap_config hfpll_regmap_config = { 4162306a36Sopenharmony_ci .reg_bits = 32, 4262306a36Sopenharmony_ci .reg_stride = 4, 4362306a36Sopenharmony_ci .val_bits = 32, 4462306a36Sopenharmony_ci .max_register = 0x30, 4562306a36Sopenharmony_ci .fast_io = true, 4662306a36Sopenharmony_ci}; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cistatic int qcom_hfpll_probe(struct platform_device *pdev) 4962306a36Sopenharmony_ci{ 5062306a36Sopenharmony_ci struct device *dev = &pdev->dev; 5162306a36Sopenharmony_ci void __iomem *base; 5262306a36Sopenharmony_ci struct regmap *regmap; 5362306a36Sopenharmony_ci struct clk_hfpll *h; 5462306a36Sopenharmony_ci struct clk_init_data init = { 5562306a36Sopenharmony_ci .num_parents = 1, 5662306a36Sopenharmony_ci .ops = &clk_ops_hfpll, 5762306a36Sopenharmony_ci /* 5862306a36Sopenharmony_ci * rather than marking the clock critical and forcing the clock 5962306a36Sopenharmony_ci * to be always enabled, we make sure that the clock is not 6062306a36Sopenharmony_ci * disabled: the firmware remains responsible of enabling this 6162306a36Sopenharmony_ci * clock (for more info check the commit log) 6262306a36Sopenharmony_ci */ 6362306a36Sopenharmony_ci .flags = CLK_IGNORE_UNUSED, 6462306a36Sopenharmony_ci }; 6562306a36Sopenharmony_ci int ret; 6662306a36Sopenharmony_ci struct clk_parent_data pdata = { .index = 0 }; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); 6962306a36Sopenharmony_ci if (!h) 7062306a36Sopenharmony_ci return -ENOMEM; 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 7362306a36Sopenharmony_ci if (IS_ERR(base)) 7462306a36Sopenharmony_ci return PTR_ERR(base); 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci regmap = devm_regmap_init_mmio(&pdev->dev, base, &hfpll_regmap_config); 7762306a36Sopenharmony_ci if (IS_ERR(regmap)) 7862306a36Sopenharmony_ci return PTR_ERR(regmap); 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci if (of_property_read_string_index(dev->of_node, "clock-output-names", 8162306a36Sopenharmony_ci 0, &init.name)) 8262306a36Sopenharmony_ci return -ENODEV; 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci init.parent_data = &pdata; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci h->d = &hdata; 8762306a36Sopenharmony_ci h->clkr.hw.init = &init; 8862306a36Sopenharmony_ci spin_lock_init(&h->lock); 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci ret = devm_clk_register_regmap(dev, &h->clkr); 9162306a36Sopenharmony_ci if (ret) { 9262306a36Sopenharmony_ci dev_err(dev, "failed to register regmap clock: %d\n", ret); 9362306a36Sopenharmony_ci return ret; 9462306a36Sopenharmony_ci } 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 9762306a36Sopenharmony_ci &h->clkr.hw); 9862306a36Sopenharmony_ci} 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_cistatic struct platform_driver qcom_hfpll_driver = { 10162306a36Sopenharmony_ci .probe = qcom_hfpll_probe, 10262306a36Sopenharmony_ci .driver = { 10362306a36Sopenharmony_ci .name = "qcom-hfpll", 10462306a36Sopenharmony_ci .of_match_table = qcom_hfpll_match_table, 10562306a36Sopenharmony_ci }, 10662306a36Sopenharmony_ci}; 10762306a36Sopenharmony_cimodule_platform_driver(qcom_hfpll_driver); 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ciMODULE_DESCRIPTION("QCOM HFPLL Clock Driver"); 11062306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 11162306a36Sopenharmony_ciMODULE_ALIAS("platform:qcom-hfpll"); 112