162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2017, Linaro Limited 462306a36Sopenharmony_ci * Author: Georgi Djakov <georgi.djakov@linaro.org> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#ifndef __QCOM_CLK_REGMAP_MUX_DIV_H__ 862306a36Sopenharmony_ci#define __QCOM_CLK_REGMAP_MUX_DIV_H__ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <linux/clk-provider.h> 1162306a36Sopenharmony_ci#include "clk-regmap.h" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/** 1462306a36Sopenharmony_ci * struct mux_div_clk - combined mux/divider clock 1562306a36Sopenharmony_ci * @reg_offset: offset of the mux/divider register 1662306a36Sopenharmony_ci * @hid_width: number of bits in half integer divider 1762306a36Sopenharmony_ci * @hid_shift: lowest bit of hid value field 1862306a36Sopenharmony_ci * @src_width: number of bits in source select 1962306a36Sopenharmony_ci * @src_shift: lowest bit of source select field 2062306a36Sopenharmony_ci * @div: the divider raw configuration value 2162306a36Sopenharmony_ci * @src: the mux index which will be used if the clock is enabled 2262306a36Sopenharmony_ci * @parent_map: map from parent_names index to src_sel field 2362306a36Sopenharmony_ci * @clkr: handle between common and hardware-specific interfaces 2462306a36Sopenharmony_ci * @pclk: the input PLL clock 2562306a36Sopenharmony_ci * @clk_nb: clock notifier for rate changes of the input PLL 2662306a36Sopenharmony_ci */ 2762306a36Sopenharmony_cistruct clk_regmap_mux_div { 2862306a36Sopenharmony_ci u32 reg_offset; 2962306a36Sopenharmony_ci u32 hid_width; 3062306a36Sopenharmony_ci u32 hid_shift; 3162306a36Sopenharmony_ci u32 src_width; 3262306a36Sopenharmony_ci u32 src_shift; 3362306a36Sopenharmony_ci u32 div; 3462306a36Sopenharmony_ci u32 src; 3562306a36Sopenharmony_ci const u32 *parent_map; 3662306a36Sopenharmony_ci struct clk_regmap clkr; 3762306a36Sopenharmony_ci struct clk *pclk; 3862306a36Sopenharmony_ci struct notifier_block clk_nb; 3962306a36Sopenharmony_ci}; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ciextern const struct clk_ops clk_regmap_mux_div_ops; 4262306a36Sopenharmony_ciextern int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div); 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci#endif 45