162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef __MACH_MMP_CLK_RESET_H 362306a36Sopenharmony_ci#define __MACH_MMP_CLK_RESET_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#include <linux/reset-controller.h> 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#define MMP_RESET_INVERT 1 862306a36Sopenharmony_ci 962306a36Sopenharmony_cistruct mmp_clk_reset_cell { 1062306a36Sopenharmony_ci unsigned int clk_id; 1162306a36Sopenharmony_ci void __iomem *reg; 1262306a36Sopenharmony_ci u32 bits; 1362306a36Sopenharmony_ci unsigned int flags; 1462306a36Sopenharmony_ci spinlock_t *lock; 1562306a36Sopenharmony_ci}; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_cistruct mmp_clk_reset_unit { 1862306a36Sopenharmony_ci struct reset_controller_dev rcdev; 1962306a36Sopenharmony_ci struct mmp_clk_reset_cell *cells; 2062306a36Sopenharmony_ci}; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#ifdef CONFIG_RESET_CONTROLLER 2362306a36Sopenharmony_civoid mmp_clk_reset_register(struct device_node *np, 2462306a36Sopenharmony_ci struct mmp_clk_reset_cell *cells, int nr_resets); 2562306a36Sopenharmony_ci#else 2662306a36Sopenharmony_cistatic inline void mmp_clk_reset_register(struct device_node *np, 2762306a36Sopenharmony_ci struct mmp_clk_reset_cell *cells, int nr_resets) 2862306a36Sopenharmony_ci{ 2962306a36Sopenharmony_ci} 3062306a36Sopenharmony_ci#endif 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci#endif 33