162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci//
362306a36Sopenharmony_ci// Copyright (c) 2022 MediaTek Inc.
462306a36Sopenharmony_ci// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci#include <linux/clk-provider.h>
762306a36Sopenharmony_ci#include <linux/module.h>
862306a36Sopenharmony_ci#include <linux/platform_device.h>
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#include "clk-mtk.h"
1162306a36Sopenharmony_ci#include "clk-gate.h"
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include <dt-bindings/clock/mt8186-clk.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec0_cg_regs = {
1662306a36Sopenharmony_ci	.set_ofs = 0x0,
1762306a36Sopenharmony_ci	.clr_ofs = 0x4,
1862306a36Sopenharmony_ci	.sta_ofs = 0x0,
1962306a36Sopenharmony_ci};
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec1_cg_regs = {
2262306a36Sopenharmony_ci	.set_ofs = 0x190,
2362306a36Sopenharmony_ci	.clr_ofs = 0x190,
2462306a36Sopenharmony_ci	.sta_ofs = 0x190,
2562306a36Sopenharmony_ci};
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec2_cg_regs = {
2862306a36Sopenharmony_ci	.set_ofs = 0x200,
2962306a36Sopenharmony_ci	.clr_ofs = 0x204,
3062306a36Sopenharmony_ci	.sta_ofs = 0x200,
3162306a36Sopenharmony_ci};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec3_cg_regs = {
3462306a36Sopenharmony_ci	.set_ofs = 0x8,
3562306a36Sopenharmony_ci	.clr_ofs = 0xc,
3662306a36Sopenharmony_ci	.sta_ofs = 0x8,
3762306a36Sopenharmony_ci};
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci#define GATE_VDEC0(_id, _name, _parent, _shift)			\
4062306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci#define GATE_VDEC1(_id, _name, _parent, _shift)			\
4362306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci#define GATE_VDEC2(_id, _name, _parent, _shift)			\
4662306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci#define GATE_VDEC3(_id, _name, _parent, _shift)			\
4962306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_cistatic const struct mtk_gate vdec_clks[] = {
5262306a36Sopenharmony_ci	/* VDEC0 */
5362306a36Sopenharmony_ci	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "top_vdec", 0),
5462306a36Sopenharmony_ci	GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "top_vdec", 4),
5562306a36Sopenharmony_ci	GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "top_vdec", 8),
5662306a36Sopenharmony_ci	/* VDEC1 */
5762306a36Sopenharmony_ci	GATE_VDEC1(CLK_VDEC_MINI_MDP_CKEN_CFG_RG, "vdec_mini_mdp_cken_cfg_rg", "top_vdec", 0),
5862306a36Sopenharmony_ci	/* VDEC2 */
5962306a36Sopenharmony_ci	GATE_VDEC2(CLK_VDEC_LAT_CKEN, "vdec_lat_cken", "top_vdec", 0),
6062306a36Sopenharmony_ci	GATE_VDEC2(CLK_VDEC_LAT_ACTIVE, "vdec_lat_active", "top_vdec", 4),
6162306a36Sopenharmony_ci	GATE_VDEC2(CLK_VDEC_LAT_CKEN_ENG, "vdec_lat_cken_eng", "top_vdec", 8),
6262306a36Sopenharmony_ci	/* VDEC3 */
6362306a36Sopenharmony_ci	GATE_VDEC3(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "top_vdec", 0),
6462306a36Sopenharmony_ci};
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_cistatic const struct mtk_clk_desc vdec_desc = {
6762306a36Sopenharmony_ci	.clks = vdec_clks,
6862306a36Sopenharmony_ci	.num_clks = ARRAY_SIZE(vdec_clks),
6962306a36Sopenharmony_ci};
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_cistatic const struct of_device_id of_match_clk_mt8186_vdec[] = {
7262306a36Sopenharmony_ci	{
7362306a36Sopenharmony_ci		.compatible = "mediatek,mt8186-vdecsys",
7462306a36Sopenharmony_ci		.data = &vdec_desc,
7562306a36Sopenharmony_ci	}, {
7662306a36Sopenharmony_ci		/* sentinel */
7762306a36Sopenharmony_ci	}
7862306a36Sopenharmony_ci};
7962306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_match_clk_mt8186_vdec);
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_cistatic struct platform_driver clk_mt8186_vdec_drv = {
8262306a36Sopenharmony_ci	.probe = mtk_clk_simple_probe,
8362306a36Sopenharmony_ci	.remove_new = mtk_clk_simple_remove,
8462306a36Sopenharmony_ci	.driver = {
8562306a36Sopenharmony_ci		.name = "clk-mt8186-vdec",
8662306a36Sopenharmony_ci		.of_match_table = of_match_clk_mt8186_vdec,
8762306a36Sopenharmony_ci	},
8862306a36Sopenharmony_ci};
8962306a36Sopenharmony_cimodule_platform_driver(clk_mt8186_vdec_drv);
9062306a36Sopenharmony_ciMODULE_LICENSE("GPL");
91