1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Copyright (c) 2022 Collabora Ltd.
5 * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
6 */
7
8#include <dt-bindings/clock/mt8173-clk.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include "clk-gate.h"
12#include "clk-mtk.h"
13
14static const struct mtk_gate_regs img_cg_regs = {
15	.set_ofs = 0x0004,
16	.clr_ofs = 0x0008,
17	.sta_ofs = 0x0000,
18};
19
20#define GATE_IMG(_id, _name, _parent, _shift)			\
21	GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
22
23static const struct mtk_gate img_clks[] = {
24	GATE_DUMMY(CLK_DUMMY, "img_dummy"),
25	GATE_IMG(CLK_IMG_LARB2_SMI, "img_larb2_smi", "mm_sel", 0),
26	GATE_IMG(CLK_IMG_CAM_SMI, "img_cam_smi", "mm_sel", 5),
27	GATE_IMG(CLK_IMG_CAM_CAM, "img_cam_cam", "mm_sel", 6),
28	GATE_IMG(CLK_IMG_SEN_TG, "img_sen_tg", "camtg_sel", 7),
29	GATE_IMG(CLK_IMG_SEN_CAM, "img_sen_cam", "mm_sel", 8),
30	GATE_IMG(CLK_IMG_CAM_SV, "img_cam_sv", "mm_sel", 9),
31	GATE_IMG(CLK_IMG_FD, "img_fd", "mm_sel", 11),
32};
33
34static const struct mtk_clk_desc img_desc = {
35	.clks = img_clks,
36	.num_clks = ARRAY_SIZE(img_clks),
37};
38
39static const struct of_device_id of_match_clk_mt8173_imgsys[] = {
40	{ .compatible = "mediatek,mt8173-imgsys", .data = &img_desc },
41	{ /* sentinel */ }
42};
43MODULE_DEVICE_TABLE(of, of_match_clk_mt8173_imgsys);
44
45static struct platform_driver clk_mt8173_vdecsys_drv = {
46	.probe = mtk_clk_simple_probe,
47	.remove_new = mtk_clk_simple_remove,
48	.driver = {
49		.name = "clk-mt8173-imgsys",
50		.of_match_table = of_match_clk_mt8173_imgsys,
51	},
52};
53module_platform_driver(clk_mt8173_vdecsys_drv);
54
55MODULE_DESCRIPTION("MediaTek MT8173 vdecsys clocks driver");
56MODULE_LICENSE("GPL");
57