162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2020 MediaTek Inc.
462306a36Sopenharmony_ci * Copyright (c) 2020 BayLibre, SAS
562306a36Sopenharmony_ci * Author: James Liao <jamesjj.liao@mediatek.com>
662306a36Sopenharmony_ci *         Fabien Parent <fparent@baylibre.com>
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#include <linux/clk-provider.h>
1062306a36Sopenharmony_ci#include <linux/mod_devicetable.h>
1162306a36Sopenharmony_ci#include <linux/platform_device.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include "clk-mtk.h"
1462306a36Sopenharmony_ci#include "clk-gate.h"
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#include <dt-bindings/clock/mt8167-clk.h>
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec0_cg_regs = {
1962306a36Sopenharmony_ci	.set_ofs = 0x0,
2062306a36Sopenharmony_ci	.clr_ofs = 0x4,
2162306a36Sopenharmony_ci	.sta_ofs = 0x0,
2262306a36Sopenharmony_ci};
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec1_cg_regs = {
2562306a36Sopenharmony_ci	.set_ofs = 0x8,
2662306a36Sopenharmony_ci	.clr_ofs = 0xc,
2762306a36Sopenharmony_ci	.sta_ofs = 0x8,
2862306a36Sopenharmony_ci};
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci#define GATE_VDEC0_I(_id, _name, _parent, _shift)			\
3162306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci#define GATE_VDEC1_I(_id, _name, _parent, _shift)			\
3462306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_cistatic const struct mtk_gate vdec_clks[] = {
3762306a36Sopenharmony_ci	/* VDEC0 */
3862306a36Sopenharmony_ci	GATE_VDEC0_I(CLK_VDEC_CKEN, "vdec_cken", "rg_vdec", 0),
3962306a36Sopenharmony_ci	/* VDEC1 */
4062306a36Sopenharmony_ci	GATE_VDEC1_I(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "smi_mm", 0),
4162306a36Sopenharmony_ci};
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_cistatic const struct mtk_clk_desc vdec_desc = {
4462306a36Sopenharmony_ci	.clks = vdec_clks,
4562306a36Sopenharmony_ci	.num_clks = ARRAY_SIZE(vdec_clks),
4662306a36Sopenharmony_ci};
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_cistatic const struct of_device_id of_match_clk_mt8167_vdec[] = {
4962306a36Sopenharmony_ci	{ .compatible = "mediatek,mt8167-vdecsys", .data = &vdec_desc },
5062306a36Sopenharmony_ci	{ /* sentinel */ }
5162306a36Sopenharmony_ci};
5262306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_match_clk_mt8167_vdec);
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_cistatic struct platform_driver clk_mt8167_vdec_drv = {
5562306a36Sopenharmony_ci	.probe = mtk_clk_simple_probe,
5662306a36Sopenharmony_ci	.remove_new = mtk_clk_simple_remove,
5762306a36Sopenharmony_ci	.driver = {
5862306a36Sopenharmony_ci		.name = "clk-mt8167-vdecsys",
5962306a36Sopenharmony_ci		.of_match_table = of_match_clk_mt8167_vdec,
6062306a36Sopenharmony_ci	},
6162306a36Sopenharmony_ci};
6262306a36Sopenharmony_cimodule_platform_driver(clk_mt8167_vdec_drv);
6362306a36Sopenharmony_ciMODULE_LICENSE("GPL");
64