162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2022 Collabora Ltd. 462306a36Sopenharmony_ci * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#include <dt-bindings/clock/mediatek,mt6795-clk.h> 862306a36Sopenharmony_ci#include <linux/module.h> 962306a36Sopenharmony_ci#include <linux/platform_device.h> 1062306a36Sopenharmony_ci#include "clk-gate.h" 1162306a36Sopenharmony_ci#include "clk-mtk.h" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#define GATE_VDEC(_id, _name, _parent, _regs) \ 1462306a36Sopenharmony_ci GATE_MTK(_id, _name, _parent, _regs, 0, \ 1562306a36Sopenharmony_ci &mtk_clk_gate_ops_setclr_inv) 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec0_cg_regs = { 1862306a36Sopenharmony_ci .set_ofs = 0x0000, 1962306a36Sopenharmony_ci .clr_ofs = 0x0004, 2062306a36Sopenharmony_ci .sta_ofs = 0x0000, 2162306a36Sopenharmony_ci}; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec1_cg_regs = { 2462306a36Sopenharmony_ci .set_ofs = 0x0008, 2562306a36Sopenharmony_ci .clr_ofs = 0x000c, 2662306a36Sopenharmony_ci .sta_ofs = 0x0008, 2762306a36Sopenharmony_ci}; 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_cistatic const struct mtk_gate vdec_clks[] = { 3062306a36Sopenharmony_ci GATE_VDEC(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", &vdec0_cg_regs), 3162306a36Sopenharmony_ci GATE_VDEC(CLK_VDEC_LARB_CKEN, "vdec_larb_cken", "mm_sel", &vdec1_cg_regs), 3262306a36Sopenharmony_ci}; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_cistatic const struct mtk_clk_desc vdec_desc = { 3562306a36Sopenharmony_ci .clks = vdec_clks, 3662306a36Sopenharmony_ci .num_clks = ARRAY_SIZE(vdec_clks), 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistatic const struct of_device_id of_match_clk_mt6795_vdecsys[] = { 4062306a36Sopenharmony_ci { .compatible = "mediatek,mt6795-vdecsys", .data = &vdec_desc }, 4162306a36Sopenharmony_ci { /* sentinel */ } 4262306a36Sopenharmony_ci}; 4362306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_match_clk_mt6795_vdecsys); 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cistatic struct platform_driver clk_mt6795_vdecsys_drv = { 4662306a36Sopenharmony_ci .probe = mtk_clk_simple_probe, 4762306a36Sopenharmony_ci .remove_new = mtk_clk_simple_remove, 4862306a36Sopenharmony_ci .driver = { 4962306a36Sopenharmony_ci .name = "clk-mt6795-vdecsys", 5062306a36Sopenharmony_ci .of_match_table = of_match_clk_mt6795_vdecsys, 5162306a36Sopenharmony_ci }, 5262306a36Sopenharmony_ci}; 5362306a36Sopenharmony_cimodule_platform_driver(clk_mt6795_vdecsys_drv); 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ciMODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver"); 5662306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 57