162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2014 MediaTek Inc. 462306a36Sopenharmony_ci * Author: Shunli Wang <shunli.wang@mediatek.com> 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#include <linux/clk-provider.h> 862306a36Sopenharmony_ci#include <linux/platform_device.h> 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include "clk-mtk.h" 1162306a36Sopenharmony_ci#include "clk-gate.h" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <dt-bindings/clock/mt2701-clk.h> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec0_cg_regs = { 1662306a36Sopenharmony_ci .set_ofs = 0x0000, 1762306a36Sopenharmony_ci .clr_ofs = 0x0004, 1862306a36Sopenharmony_ci .sta_ofs = 0x0000, 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistatic const struct mtk_gate_regs vdec1_cg_regs = { 2262306a36Sopenharmony_ci .set_ofs = 0x0008, 2362306a36Sopenharmony_ci .clr_ofs = 0x000c, 2462306a36Sopenharmony_ci .sta_ofs = 0x0008, 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci#define GATE_VDEC0(_id, _name, _parent, _shift) \ 2862306a36Sopenharmony_ci GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci#define GATE_VDEC1(_id, _name, _parent, _shift) \ 3162306a36Sopenharmony_ci GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic const struct mtk_gate vdec_clks[] = { 3462306a36Sopenharmony_ci GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0), 3562306a36Sopenharmony_ci GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0), 3662306a36Sopenharmony_ci}; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_cistatic const struct mtk_clk_desc vdec_desc = { 3962306a36Sopenharmony_ci .clks = vdec_clks, 4062306a36Sopenharmony_ci .num_clks = ARRAY_SIZE(vdec_clks), 4162306a36Sopenharmony_ci}; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_cistatic const struct of_device_id of_match_clk_mt2701_vdec[] = { 4462306a36Sopenharmony_ci { 4562306a36Sopenharmony_ci .compatible = "mediatek,mt2701-vdecsys", 4662306a36Sopenharmony_ci .data = &vdec_desc, 4762306a36Sopenharmony_ci }, { 4862306a36Sopenharmony_ci /* sentinel */ 4962306a36Sopenharmony_ci } 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_match_clk_mt2701_vdec); 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_cistatic struct platform_driver clk_mt2701_vdec_drv = { 5462306a36Sopenharmony_ci .probe = mtk_clk_simple_probe, 5562306a36Sopenharmony_ci .remove_new = mtk_clk_simple_remove, 5662306a36Sopenharmony_ci .driver = { 5762306a36Sopenharmony_ci .name = "clk-mt2701-vdec", 5862306a36Sopenharmony_ci .of_match_table = of_match_clk_mt2701_vdec, 5962306a36Sopenharmony_ci }, 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_cimodule_platform_driver(clk_mt2701_vdec_drv); 6262306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 63