162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2014 MediaTek Inc.
462306a36Sopenharmony_ci * Author: Shunli Wang <shunli.wang@mediatek.com>
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#include <linux/clk-provider.h>
862306a36Sopenharmony_ci#include <linux/platform_device.h>
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#include "clk-mtk.h"
1162306a36Sopenharmony_ci#include "clk-gate.h"
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include <dt-bindings/clock/mt2701-clk.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_cistatic const struct mtk_gate_regs eth_cg_regs = {
1662306a36Sopenharmony_ci	.sta_ofs = 0x0030,
1762306a36Sopenharmony_ci};
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci#define GATE_ETH(_id, _name, _parent, _shift)			\
2062306a36Sopenharmony_ci	GATE_MTK(_id, _name, _parent, &eth_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_cistatic const struct mtk_gate eth_clks[] = {
2362306a36Sopenharmony_ci	GATE_DUMMY(CLK_DUMMY, "eth_dummy"),
2462306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
2562306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
2662306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
2762306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
2862306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11),
2962306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14),
3062306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17),
3162306a36Sopenharmony_ci	GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),
3262306a36Sopenharmony_ci};
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_cistatic u16 rst_ofs[] = { 0x34, };
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_cistatic const struct mtk_clk_rst_desc clk_rst_desc = {
3762306a36Sopenharmony_ci	.version = MTK_RST_SIMPLE,
3862306a36Sopenharmony_ci	.rst_bank_ofs = rst_ofs,
3962306a36Sopenharmony_ci	.rst_bank_nr = ARRAY_SIZE(rst_ofs),
4062306a36Sopenharmony_ci};
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_cistatic const struct mtk_clk_desc eth_desc = {
4362306a36Sopenharmony_ci	.clks = eth_clks,
4462306a36Sopenharmony_ci	.num_clks = ARRAY_SIZE(eth_clks),
4562306a36Sopenharmony_ci	.rst_desc = &clk_rst_desc,
4662306a36Sopenharmony_ci};
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_cistatic const struct of_device_id of_match_clk_mt2701_eth[] = {
4962306a36Sopenharmony_ci	{ .compatible = "mediatek,mt2701-ethsys", .data = &eth_desc },
5062306a36Sopenharmony_ci	{ /* sentinel */ }
5162306a36Sopenharmony_ci};
5262306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_match_clk_mt2701_eth);
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_cistatic struct platform_driver clk_mt2701_eth_drv = {
5562306a36Sopenharmony_ci	.probe = mtk_clk_simple_probe,
5662306a36Sopenharmony_ci	.remove_new = mtk_clk_simple_remove,
5762306a36Sopenharmony_ci	.driver = {
5862306a36Sopenharmony_ci		.name = "clk-mt2701-eth",
5962306a36Sopenharmony_ci		.of_match_table = of_match_clk_mt2701_eth,
6062306a36Sopenharmony_ci	},
6162306a36Sopenharmony_ci};
6262306a36Sopenharmony_cimodule_platform_driver(clk_mt2701_eth_drv);
6362306a36Sopenharmony_ciMODULE_LICENSE("GPL");
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