162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * HiSilicon Clock and Reset Driver Header 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2016 HiSilicon Limited. 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#ifndef __HISI_CRG_H 962306a36Sopenharmony_ci#define __HISI_CRG_H 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_cistruct hisi_clock_data; 1262306a36Sopenharmony_cistruct hisi_reset_controller; 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_cistruct hisi_crg_funcs { 1562306a36Sopenharmony_ci struct hisi_clock_data* (*register_clks)(struct platform_device *pdev); 1662306a36Sopenharmony_ci void (*unregister_clks)(struct platform_device *pdev); 1762306a36Sopenharmony_ci}; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_cistruct hisi_crg_dev { 2062306a36Sopenharmony_ci struct hisi_clock_data *clk_data; 2162306a36Sopenharmony_ci struct hisi_reset_controller *rstc; 2262306a36Sopenharmony_ci const struct hisi_crg_funcs *funcs; 2362306a36Sopenharmony_ci}; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci#endif /* __HISI_CRG_H */ 26