162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Hisilicon HiP04 clock driver 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2013-2014 Hisilicon Limited. 662306a36Sopenharmony_ci * Copyright (c) 2013-2014 Linaro Limited. 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Author: Haojian Zhuang <haojian.zhuang@linaro.org> 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/kernel.h> 1262306a36Sopenharmony_ci#include <linux/clk-provider.h> 1362306a36Sopenharmony_ci#include <linux/io.h> 1462306a36Sopenharmony_ci#include <linux/slab.h> 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#include <dt-bindings/clock/hip04-clock.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#include "clk.h" 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* fixed rate clocks */ 2162306a36Sopenharmony_cistatic struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = { 2262306a36Sopenharmony_ci { HIP04_OSC50M, "osc50m", NULL, 0, 50000000, }, 2362306a36Sopenharmony_ci { HIP04_CLK_50M, "clk50m", NULL, 0, 50000000, }, 2462306a36Sopenharmony_ci { HIP04_CLK_168M, "clk168m", NULL, 0, 168750000, }, 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_cistatic void __init hip04_clk_init(struct device_node *np) 2862306a36Sopenharmony_ci{ 2962306a36Sopenharmony_ci struct hisi_clock_data *clk_data; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci clk_data = hisi_clk_init(np, HIP04_NR_CLKS); 3262306a36Sopenharmony_ci if (!clk_data) 3362306a36Sopenharmony_ci return; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci hisi_clk_register_fixed_rate(hip04_fixed_rate_clks, 3662306a36Sopenharmony_ci ARRAY_SIZE(hip04_fixed_rate_clks), 3762306a36Sopenharmony_ci clk_data); 3862306a36Sopenharmony_ci} 3962306a36Sopenharmony_ciCLK_OF_DECLARE(hip04_clk, "hisilicon,hip04-clock", hip04_clk_init); 40