162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Hi6220 stub clock driver 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2015 Hisilicon Limited. 662306a36Sopenharmony_ci * Copyright (c) 2015 Linaro Limited. 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Author: Leo Yan <leo.yan@linaro.org> 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/clk-provider.h> 1262306a36Sopenharmony_ci#include <linux/err.h> 1362306a36Sopenharmony_ci#include <linux/kernel.h> 1462306a36Sopenharmony_ci#include <linux/mfd/syscon.h> 1562306a36Sopenharmony_ci#include <linux/mailbox_client.h> 1662306a36Sopenharmony_ci#include <linux/of.h> 1762306a36Sopenharmony_ci#include <linux/platform_device.h> 1862306a36Sopenharmony_ci#include <linux/regmap.h> 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* Stub clocks id */ 2162306a36Sopenharmony_ci#define HI6220_STUB_ACPU0 0 2262306a36Sopenharmony_ci#define HI6220_STUB_ACPU1 1 2362306a36Sopenharmony_ci#define HI6220_STUB_GPU 2 2462306a36Sopenharmony_ci#define HI6220_STUB_DDR 5 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci/* Mailbox message */ 2762306a36Sopenharmony_ci#define HI6220_MBOX_MSG_LEN 8 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define HI6220_MBOX_FREQ 0xA 3062306a36Sopenharmony_ci#define HI6220_MBOX_CMD_SET 0x3 3162306a36Sopenharmony_ci#define HI6220_MBOX_OBJ_AP 0x0 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci/* CPU dynamic frequency scaling */ 3462306a36Sopenharmony_ci#define ACPU_DFS_FREQ_MAX 0x1724 3562306a36Sopenharmony_ci#define ACPU_DFS_CUR_FREQ 0x17CC 3662306a36Sopenharmony_ci#define ACPU_DFS_FLAG 0x1B30 3762306a36Sopenharmony_ci#define ACPU_DFS_FREQ_REQ 0x1B34 3862306a36Sopenharmony_ci#define ACPU_DFS_FREQ_LMT 0x1B38 3962306a36Sopenharmony_ci#define ACPU_DFS_LOCK_FLAG 0xAEAEAEAE 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci#define to_stub_clk(hw) container_of(hw, struct hi6220_stub_clk, hw) 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_cistruct hi6220_stub_clk { 4462306a36Sopenharmony_ci u32 id; 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci struct device *dev; 4762306a36Sopenharmony_ci struct clk_hw hw; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci struct regmap *dfs_map; 5062306a36Sopenharmony_ci struct mbox_client cl; 5162306a36Sopenharmony_ci struct mbox_chan *mbox; 5262306a36Sopenharmony_ci}; 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_cistruct hi6220_mbox_msg { 5562306a36Sopenharmony_ci unsigned char type; 5662306a36Sopenharmony_ci unsigned char cmd; 5762306a36Sopenharmony_ci unsigned char obj; 5862306a36Sopenharmony_ci unsigned char src; 5962306a36Sopenharmony_ci unsigned char para[4]; 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ciunion hi6220_mbox_data { 6362306a36Sopenharmony_ci unsigned int data[HI6220_MBOX_MSG_LEN]; 6462306a36Sopenharmony_ci struct hi6220_mbox_msg msg; 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_cistatic unsigned int hi6220_acpu_get_freq(struct hi6220_stub_clk *stub_clk) 6862306a36Sopenharmony_ci{ 6962306a36Sopenharmony_ci unsigned int freq; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci regmap_read(stub_clk->dfs_map, ACPU_DFS_CUR_FREQ, &freq); 7262306a36Sopenharmony_ci return freq; 7362306a36Sopenharmony_ci} 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistatic int hi6220_acpu_set_freq(struct hi6220_stub_clk *stub_clk, 7662306a36Sopenharmony_ci unsigned int freq) 7762306a36Sopenharmony_ci{ 7862306a36Sopenharmony_ci union hi6220_mbox_data data; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci /* set the frequency in sram */ 8162306a36Sopenharmony_ci regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, freq); 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci /* compound mailbox message */ 8462306a36Sopenharmony_ci data.msg.type = HI6220_MBOX_FREQ; 8562306a36Sopenharmony_ci data.msg.cmd = HI6220_MBOX_CMD_SET; 8662306a36Sopenharmony_ci data.msg.obj = HI6220_MBOX_OBJ_AP; 8762306a36Sopenharmony_ci data.msg.src = HI6220_MBOX_OBJ_AP; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci mbox_send_message(stub_clk->mbox, &data); 9062306a36Sopenharmony_ci return 0; 9162306a36Sopenharmony_ci} 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_cistatic int hi6220_acpu_round_freq(struct hi6220_stub_clk *stub_clk, 9462306a36Sopenharmony_ci unsigned int freq) 9562306a36Sopenharmony_ci{ 9662306a36Sopenharmony_ci unsigned int limit_flag, limit_freq = UINT_MAX; 9762306a36Sopenharmony_ci unsigned int max_freq; 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci /* check the constrained frequency */ 10062306a36Sopenharmony_ci regmap_read(stub_clk->dfs_map, ACPU_DFS_FLAG, &limit_flag); 10162306a36Sopenharmony_ci if (limit_flag == ACPU_DFS_LOCK_FLAG) 10262306a36Sopenharmony_ci regmap_read(stub_clk->dfs_map, ACPU_DFS_FREQ_LMT, &limit_freq); 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci /* check the supported maximum frequency */ 10562306a36Sopenharmony_ci regmap_read(stub_clk->dfs_map, ACPU_DFS_FREQ_MAX, &max_freq); 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci /* calculate the real maximum frequency */ 10862306a36Sopenharmony_ci max_freq = min(max_freq, limit_freq); 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci if (WARN_ON(freq > max_freq)) 11162306a36Sopenharmony_ci freq = max_freq; 11262306a36Sopenharmony_ci 11362306a36Sopenharmony_ci return freq; 11462306a36Sopenharmony_ci} 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_cistatic unsigned long hi6220_stub_clk_recalc_rate(struct clk_hw *hw, 11762306a36Sopenharmony_ci unsigned long parent_rate) 11862306a36Sopenharmony_ci{ 11962306a36Sopenharmony_ci u32 rate = 0; 12062306a36Sopenharmony_ci struct hi6220_stub_clk *stub_clk = to_stub_clk(hw); 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci switch (stub_clk->id) { 12362306a36Sopenharmony_ci case HI6220_STUB_ACPU0: 12462306a36Sopenharmony_ci rate = hi6220_acpu_get_freq(stub_clk); 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci /* convert from kHz to Hz */ 12762306a36Sopenharmony_ci rate *= 1000; 12862306a36Sopenharmony_ci break; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci default: 13162306a36Sopenharmony_ci dev_err(stub_clk->dev, "%s: un-supported clock id %d\n", 13262306a36Sopenharmony_ci __func__, stub_clk->id); 13362306a36Sopenharmony_ci break; 13462306a36Sopenharmony_ci } 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci return rate; 13762306a36Sopenharmony_ci} 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_cistatic int hi6220_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate, 14062306a36Sopenharmony_ci unsigned long parent_rate) 14162306a36Sopenharmony_ci{ 14262306a36Sopenharmony_ci struct hi6220_stub_clk *stub_clk = to_stub_clk(hw); 14362306a36Sopenharmony_ci unsigned long new_rate = rate / 1000; /* kHz */ 14462306a36Sopenharmony_ci int ret = 0; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci switch (stub_clk->id) { 14762306a36Sopenharmony_ci case HI6220_STUB_ACPU0: 14862306a36Sopenharmony_ci ret = hi6220_acpu_set_freq(stub_clk, new_rate); 14962306a36Sopenharmony_ci if (ret < 0) 15062306a36Sopenharmony_ci return ret; 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_ci break; 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ci default: 15562306a36Sopenharmony_ci dev_err(stub_clk->dev, "%s: un-supported clock id %d\n", 15662306a36Sopenharmony_ci __func__, stub_clk->id); 15762306a36Sopenharmony_ci break; 15862306a36Sopenharmony_ci } 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci pr_debug("%s: set rate=%ldkHz\n", __func__, new_rate); 16162306a36Sopenharmony_ci return ret; 16262306a36Sopenharmony_ci} 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_cistatic long hi6220_stub_clk_round_rate(struct clk_hw *hw, unsigned long rate, 16562306a36Sopenharmony_ci unsigned long *parent_rate) 16662306a36Sopenharmony_ci{ 16762306a36Sopenharmony_ci struct hi6220_stub_clk *stub_clk = to_stub_clk(hw); 16862306a36Sopenharmony_ci unsigned long new_rate = rate / 1000; /* kHz */ 16962306a36Sopenharmony_ci 17062306a36Sopenharmony_ci switch (stub_clk->id) { 17162306a36Sopenharmony_ci case HI6220_STUB_ACPU0: 17262306a36Sopenharmony_ci new_rate = hi6220_acpu_round_freq(stub_clk, new_rate); 17362306a36Sopenharmony_ci 17462306a36Sopenharmony_ci /* convert from kHz to Hz */ 17562306a36Sopenharmony_ci new_rate *= 1000; 17662306a36Sopenharmony_ci break; 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_ci default: 17962306a36Sopenharmony_ci dev_err(stub_clk->dev, "%s: un-supported clock id %d\n", 18062306a36Sopenharmony_ci __func__, stub_clk->id); 18162306a36Sopenharmony_ci break; 18262306a36Sopenharmony_ci } 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci return new_rate; 18562306a36Sopenharmony_ci} 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_cistatic const struct clk_ops hi6220_stub_clk_ops = { 18862306a36Sopenharmony_ci .recalc_rate = hi6220_stub_clk_recalc_rate, 18962306a36Sopenharmony_ci .round_rate = hi6220_stub_clk_round_rate, 19062306a36Sopenharmony_ci .set_rate = hi6220_stub_clk_set_rate, 19162306a36Sopenharmony_ci}; 19262306a36Sopenharmony_ci 19362306a36Sopenharmony_cistatic int hi6220_stub_clk_probe(struct platform_device *pdev) 19462306a36Sopenharmony_ci{ 19562306a36Sopenharmony_ci struct device *dev = &pdev->dev; 19662306a36Sopenharmony_ci struct clk_init_data init; 19762306a36Sopenharmony_ci struct hi6220_stub_clk *stub_clk; 19862306a36Sopenharmony_ci struct clk *clk; 19962306a36Sopenharmony_ci struct device_node *np = pdev->dev.of_node; 20062306a36Sopenharmony_ci int ret; 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ci stub_clk = devm_kzalloc(dev, sizeof(*stub_clk), GFP_KERNEL); 20362306a36Sopenharmony_ci if (!stub_clk) 20462306a36Sopenharmony_ci return -ENOMEM; 20562306a36Sopenharmony_ci 20662306a36Sopenharmony_ci stub_clk->dfs_map = syscon_regmap_lookup_by_phandle(np, 20762306a36Sopenharmony_ci "hisilicon,hi6220-clk-sram"); 20862306a36Sopenharmony_ci if (IS_ERR(stub_clk->dfs_map)) { 20962306a36Sopenharmony_ci dev_err(dev, "failed to get sram regmap\n"); 21062306a36Sopenharmony_ci return PTR_ERR(stub_clk->dfs_map); 21162306a36Sopenharmony_ci } 21262306a36Sopenharmony_ci 21362306a36Sopenharmony_ci stub_clk->hw.init = &init; 21462306a36Sopenharmony_ci stub_clk->dev = dev; 21562306a36Sopenharmony_ci stub_clk->id = HI6220_STUB_ACPU0; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci /* Use mailbox client with blocking mode */ 21862306a36Sopenharmony_ci stub_clk->cl.dev = dev; 21962306a36Sopenharmony_ci stub_clk->cl.tx_done = NULL; 22062306a36Sopenharmony_ci stub_clk->cl.tx_block = true; 22162306a36Sopenharmony_ci stub_clk->cl.tx_tout = 500; 22262306a36Sopenharmony_ci stub_clk->cl.knows_txdone = false; 22362306a36Sopenharmony_ci 22462306a36Sopenharmony_ci /* Allocate mailbox channel */ 22562306a36Sopenharmony_ci stub_clk->mbox = mbox_request_channel(&stub_clk->cl, 0); 22662306a36Sopenharmony_ci if (IS_ERR(stub_clk->mbox)) { 22762306a36Sopenharmony_ci dev_err(dev, "failed get mailbox channel\n"); 22862306a36Sopenharmony_ci return PTR_ERR(stub_clk->mbox); 22962306a36Sopenharmony_ci } 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci init.name = "acpu0"; 23262306a36Sopenharmony_ci init.ops = &hi6220_stub_clk_ops; 23362306a36Sopenharmony_ci init.num_parents = 0; 23462306a36Sopenharmony_ci init.flags = 0; 23562306a36Sopenharmony_ci 23662306a36Sopenharmony_ci clk = devm_clk_register(dev, &stub_clk->hw); 23762306a36Sopenharmony_ci if (IS_ERR(clk)) 23862306a36Sopenharmony_ci return PTR_ERR(clk); 23962306a36Sopenharmony_ci 24062306a36Sopenharmony_ci ret = of_clk_add_provider(np, of_clk_src_simple_get, clk); 24162306a36Sopenharmony_ci if (ret) { 24262306a36Sopenharmony_ci dev_err(dev, "failed to register OF clock provider\n"); 24362306a36Sopenharmony_ci return ret; 24462306a36Sopenharmony_ci } 24562306a36Sopenharmony_ci 24662306a36Sopenharmony_ci /* initialize buffer to zero */ 24762306a36Sopenharmony_ci regmap_write(stub_clk->dfs_map, ACPU_DFS_FLAG, 0x0); 24862306a36Sopenharmony_ci regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_REQ, 0x0); 24962306a36Sopenharmony_ci regmap_write(stub_clk->dfs_map, ACPU_DFS_FREQ_LMT, 0x0); 25062306a36Sopenharmony_ci 25162306a36Sopenharmony_ci dev_dbg(dev, "Registered clock '%s'\n", init.name); 25262306a36Sopenharmony_ci return 0; 25362306a36Sopenharmony_ci} 25462306a36Sopenharmony_ci 25562306a36Sopenharmony_cistatic const struct of_device_id hi6220_stub_clk_of_match[] = { 25662306a36Sopenharmony_ci { .compatible = "hisilicon,hi6220-stub-clk", }, 25762306a36Sopenharmony_ci {} 25862306a36Sopenharmony_ci}; 25962306a36Sopenharmony_ci 26062306a36Sopenharmony_cistatic struct platform_driver hi6220_stub_clk_driver = { 26162306a36Sopenharmony_ci .driver = { 26262306a36Sopenharmony_ci .name = "hi6220-stub-clk", 26362306a36Sopenharmony_ci .of_match_table = hi6220_stub_clk_of_match, 26462306a36Sopenharmony_ci }, 26562306a36Sopenharmony_ci .probe = hi6220_stub_clk_probe, 26662306a36Sopenharmony_ci}; 26762306a36Sopenharmony_ci 26862306a36Sopenharmony_cistatic int __init hi6220_stub_clk_init(void) 26962306a36Sopenharmony_ci{ 27062306a36Sopenharmony_ci return platform_driver_register(&hi6220_stub_clk_driver); 27162306a36Sopenharmony_ci} 27262306a36Sopenharmony_cisubsys_initcall(hi6220_stub_clk_init); 273