162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ciconfig CLK_BAIKAL_T1 362306a36Sopenharmony_ci bool "Baikal-T1 Clocks Control Unit interface" 462306a36Sopenharmony_ci depends on (MIPS_BAIKAL_T1 && OF) || COMPILE_TEST 562306a36Sopenharmony_ci default MIPS_BAIKAL_T1 662306a36Sopenharmony_ci help 762306a36Sopenharmony_ci Clocks Control Unit is the core of Baikal-T1 SoC System Controller 862306a36Sopenharmony_ci responsible for the chip subsystems clocking and resetting. It 962306a36Sopenharmony_ci consists of multiple global clock domains, which can be reset by 1062306a36Sopenharmony_ci means of the CCU control registers. These domains and devices placed 1162306a36Sopenharmony_ci in them are fed with clocks generated by a hierarchy of PLLs, 1262306a36Sopenharmony_ci configurable and fixed clock dividers. Enable this option to be able 1362306a36Sopenharmony_ci to select Baikal-T1 CCU PLLs and Dividers drivers. 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciif CLK_BAIKAL_T1 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciconfig CLK_BT1_CCU_PLL 1862306a36Sopenharmony_ci bool "Baikal-T1 CCU PLLs support" 1962306a36Sopenharmony_ci select MFD_SYSCON 2062306a36Sopenharmony_ci default MIPS_BAIKAL_T1 2162306a36Sopenharmony_ci help 2262306a36Sopenharmony_ci Enable this to support the PLLs embedded into the Baikal-T1 SoC 2362306a36Sopenharmony_ci System Controller. These are five PLLs placed at the root of the 2462306a36Sopenharmony_ci clocks hierarchy, right after an external reference oscillator 2562306a36Sopenharmony_ci (normally of 25MHz). They are used to generate high frequency 2662306a36Sopenharmony_ci signals, which are either directly wired to the consumers (like 2762306a36Sopenharmony_ci CPUs, DDR, etc.) or passed over the clock dividers to be only 2862306a36Sopenharmony_ci then used as an individual reference clock of a target device. 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciconfig CLK_BT1_CCU_DIV 3162306a36Sopenharmony_ci bool "Baikal-T1 CCU Dividers support" 3262306a36Sopenharmony_ci select MFD_SYSCON 3362306a36Sopenharmony_ci default MIPS_BAIKAL_T1 3462306a36Sopenharmony_ci help 3562306a36Sopenharmony_ci Enable this to support the CCU dividers used to distribute clocks 3662306a36Sopenharmony_ci between AXI-bus and system devices coming from CCU PLLs of Baikal-T1 3762306a36Sopenharmony_ci SoC. CCU dividers can be either configurable or with fixed divider, 3862306a36Sopenharmony_ci either gateable or ungateable. Some of the CCU dividers can be as well 3962306a36Sopenharmony_ci used to reset the domains they're supplying clock to. 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ciconfig CLK_BT1_CCU_RST 4262306a36Sopenharmony_ci bool "Baikal-T1 CCU Resets support" 4362306a36Sopenharmony_ci select RESET_CONTROLLER 4462306a36Sopenharmony_ci select MFD_SYSCON 4562306a36Sopenharmony_ci default MIPS_BAIKAL_T1 4662306a36Sopenharmony_ci help 4762306a36Sopenharmony_ci Enable this to support the CCU reset blocks responsible for the 4862306a36Sopenharmony_ci AXI-bus and some subsystems reset. These are mainly the 4962306a36Sopenharmony_ci self-deasserted reset controls but there are several lines which 5062306a36Sopenharmony_ci can be directly asserted/de-asserted (PCIe and DDR sub-domains). 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ciendif 53