162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Microchip PolarFire SoC (MPFS) hardware random driver 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved. 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Author: Conor Dooley <conor.dooley@microchip.com> 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <linux/module.h> 1162306a36Sopenharmony_ci#include <linux/hw_random.h> 1262306a36Sopenharmony_ci#include <linux/platform_device.h> 1362306a36Sopenharmony_ci#include <soc/microchip/mpfs.h> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define CMD_OPCODE 0x21 1662306a36Sopenharmony_ci#define CMD_DATA_SIZE 0U 1762306a36Sopenharmony_ci#define CMD_DATA NULL 1862306a36Sopenharmony_ci#define MBOX_OFFSET 0U 1962306a36Sopenharmony_ci#define RESP_OFFSET 0U 2062306a36Sopenharmony_ci#define RNG_RESP_BYTES 32U 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_cistruct mpfs_rng { 2362306a36Sopenharmony_ci struct mpfs_sys_controller *sys_controller; 2462306a36Sopenharmony_ci struct hwrng rng; 2562306a36Sopenharmony_ci}; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_cistatic int mpfs_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) 2862306a36Sopenharmony_ci{ 2962306a36Sopenharmony_ci struct mpfs_rng *rng_priv = container_of(rng, struct mpfs_rng, rng); 3062306a36Sopenharmony_ci u32 response_msg[RNG_RESP_BYTES / sizeof(u32)]; 3162306a36Sopenharmony_ci unsigned int count = 0, copy_size_bytes; 3262306a36Sopenharmony_ci int ret; 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci struct mpfs_mss_response response = { 3562306a36Sopenharmony_ci .resp_status = 0U, 3662306a36Sopenharmony_ci .resp_msg = (u32 *)response_msg, 3762306a36Sopenharmony_ci .resp_size = RNG_RESP_BYTES 3862306a36Sopenharmony_ci }; 3962306a36Sopenharmony_ci struct mpfs_mss_msg msg = { 4062306a36Sopenharmony_ci .cmd_opcode = CMD_OPCODE, 4162306a36Sopenharmony_ci .cmd_data_size = CMD_DATA_SIZE, 4262306a36Sopenharmony_ci .response = &response, 4362306a36Sopenharmony_ci .cmd_data = CMD_DATA, 4462306a36Sopenharmony_ci .mbox_offset = MBOX_OFFSET, 4562306a36Sopenharmony_ci .resp_offset = RESP_OFFSET 4662306a36Sopenharmony_ci }; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci while (count < max) { 4962306a36Sopenharmony_ci ret = mpfs_blocking_transaction(rng_priv->sys_controller, &msg); 5062306a36Sopenharmony_ci if (ret) 5162306a36Sopenharmony_ci return ret; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci copy_size_bytes = max - count > RNG_RESP_BYTES ? RNG_RESP_BYTES : max - count; 5462306a36Sopenharmony_ci memcpy(buf + count, response_msg, copy_size_bytes); 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci count += copy_size_bytes; 5762306a36Sopenharmony_ci if (!wait) 5862306a36Sopenharmony_ci break; 5962306a36Sopenharmony_ci } 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci return count; 6262306a36Sopenharmony_ci} 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_cistatic int mpfs_rng_probe(struct platform_device *pdev) 6562306a36Sopenharmony_ci{ 6662306a36Sopenharmony_ci struct device *dev = &pdev->dev; 6762306a36Sopenharmony_ci struct mpfs_rng *rng_priv; 6862306a36Sopenharmony_ci int ret; 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci rng_priv = devm_kzalloc(dev, sizeof(*rng_priv), GFP_KERNEL); 7162306a36Sopenharmony_ci if (!rng_priv) 7262306a36Sopenharmony_ci return -ENOMEM; 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci rng_priv->sys_controller = mpfs_sys_controller_get(&pdev->dev); 7562306a36Sopenharmony_ci if (IS_ERR(rng_priv->sys_controller)) 7662306a36Sopenharmony_ci return dev_err_probe(dev, PTR_ERR(rng_priv->sys_controller), 7762306a36Sopenharmony_ci "Failed to register system controller hwrng sub device\n"); 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci rng_priv->rng.read = mpfs_rng_read; 8062306a36Sopenharmony_ci rng_priv->rng.name = pdev->name; 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci platform_set_drvdata(pdev, rng_priv); 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci ret = devm_hwrng_register(&pdev->dev, &rng_priv->rng); 8562306a36Sopenharmony_ci if (ret) 8662306a36Sopenharmony_ci return dev_err_probe(&pdev->dev, ret, "Failed to register MPFS hwrng\n"); 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci dev_info(&pdev->dev, "Registered MPFS hwrng\n"); 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci return 0; 9162306a36Sopenharmony_ci} 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_cistatic struct platform_driver mpfs_rng_driver = { 9462306a36Sopenharmony_ci .driver = { 9562306a36Sopenharmony_ci .name = "mpfs-rng", 9662306a36Sopenharmony_ci }, 9762306a36Sopenharmony_ci .probe = mpfs_rng_probe, 9862306a36Sopenharmony_ci}; 9962306a36Sopenharmony_cimodule_platform_driver(mpfs_rng_driver); 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 10262306a36Sopenharmony_ciMODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>"); 10362306a36Sopenharmony_ciMODULE_DESCRIPTION("PolarFire SoC (MPFS) hardware random driver"); 104