162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2020-2023 Intel Corporation 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef __IVPU_MMU_CONTEXT_H__ 762306a36Sopenharmony_ci#define __IVPU_MMU_CONTEXT_H__ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <drm/drm_mm.h> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_cistruct ivpu_device; 1262306a36Sopenharmony_cistruct ivpu_file_priv; 1362306a36Sopenharmony_cistruct ivpu_addr_range; 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define IVPU_MMU_PGTABLE_ENTRIES 512ull 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_cistruct ivpu_mmu_pgtable { 1862306a36Sopenharmony_ci u64 ***pte_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; 1962306a36Sopenharmony_ci u64 **pmd_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; 2062306a36Sopenharmony_ci u64 *pud_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; 2162306a36Sopenharmony_ci u64 *pgd_dma_ptr; 2262306a36Sopenharmony_ci dma_addr_t pgd_dma; 2362306a36Sopenharmony_ci}; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_cistruct ivpu_mmu_context { 2662306a36Sopenharmony_ci struct mutex lock; /* protects: mm, pgtable, bo_list */ 2762306a36Sopenharmony_ci struct drm_mm mm; 2862306a36Sopenharmony_ci struct ivpu_mmu_pgtable pgtable; 2962306a36Sopenharmony_ci struct list_head bo_list; 3062306a36Sopenharmony_ci u32 id; 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ciint ivpu_mmu_global_context_init(struct ivpu_device *vdev); 3462306a36Sopenharmony_civoid ivpu_mmu_global_context_fini(struct ivpu_device *vdev); 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ciint ivpu_mmu_user_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 ctx_id); 3762306a36Sopenharmony_civoid ivpu_mmu_user_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx); 3862306a36Sopenharmony_civoid ivpu_mmu_user_context_mark_invalid(struct ivpu_device *vdev, u32 ssid); 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ciint ivpu_mmu_context_insert_node_locked(struct ivpu_mmu_context *ctx, 4162306a36Sopenharmony_ci const struct ivpu_addr_range *range, 4262306a36Sopenharmony_ci u64 size, struct drm_mm_node *node); 4362306a36Sopenharmony_civoid ivpu_mmu_context_remove_node_locked(struct ivpu_mmu_context *ctx, 4462306a36Sopenharmony_ci struct drm_mm_node *node); 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ciint ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, 4762306a36Sopenharmony_ci u64 vpu_addr, struct sg_table *sgt, bool llc_coherent); 4862306a36Sopenharmony_civoid ivpu_mmu_context_unmap_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, 4962306a36Sopenharmony_ci u64 vpu_addr, struct sg_table *sgt); 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci#endif /* __IVPU_MMU_CONTEXT_H__ */ 52