162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2020-2023 Intel Corporation 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef __IVPU_JSM_MSG_H__ 762306a36Sopenharmony_ci#define __IVPU_JSM_MSG_H__ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include "vpu_jsm_api.h" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ciint ivpu_jsm_register_db(struct ivpu_device *vdev, u32 ctx_id, u32 db_id, 1262306a36Sopenharmony_ci u64 jobq_base, u32 jobq_size); 1362306a36Sopenharmony_ciint ivpu_jsm_unregister_db(struct ivpu_device *vdev, u32 db_id); 1462306a36Sopenharmony_ciint ivpu_jsm_get_heartbeat(struct ivpu_device *vdev, u32 engine, u64 *heartbeat); 1562306a36Sopenharmony_ciint ivpu_jsm_reset_engine(struct ivpu_device *vdev, u32 engine); 1662306a36Sopenharmony_ciint ivpu_jsm_preempt_engine(struct ivpu_device *vdev, u32 engine, u32 preempt_id); 1762306a36Sopenharmony_ciint ivpu_jsm_dyndbg_control(struct ivpu_device *vdev, char *command, size_t size); 1862306a36Sopenharmony_ciint ivpu_jsm_trace_get_capability(struct ivpu_device *vdev, u32 *trace_destination_mask, 1962306a36Sopenharmony_ci u64 *trace_hw_component_mask); 2062306a36Sopenharmony_ciint ivpu_jsm_trace_set_config(struct ivpu_device *vdev, u32 trace_level, u32 trace_destination_mask, 2162306a36Sopenharmony_ci u64 trace_hw_component_mask); 2262306a36Sopenharmony_ciint ivpu_jsm_context_release(struct ivpu_device *vdev, u32 host_ssid); 2362306a36Sopenharmony_ci#endif 24