1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#ifndef __IVPU_IPC_H__
7#define __IVPU_IPC_H__
8
9#include <linux/interrupt.h>
10#include <linux/spinlock.h>
11
12#include "vpu_jsm_api.h"
13
14struct ivpu_bo;
15
16/* VPU FW boot notification */
17#define IVPU_IPC_CHAN_BOOT_MSG		0x3ff
18#define IVPU_IPC_BOOT_MSG_DATA_ADDR	0x424f4f54
19
20/* The alignment to be used for IPC Buffers and IPC Data. */
21#define IVPU_IPC_ALIGNMENT	   64
22
23#define IVPU_IPC_HDR_FREE	   0
24#define IVPU_IPC_HDR_ALLOCATED	   1
25
26/**
27 * struct ivpu_ipc_hdr - The IPC message header structure, exchanged
28 * with the VPU device firmware.
29 * @data_addr: The VPU address of the payload (JSM message)
30 * @data_size: The size of the payload.
31 * @channel: The channel used.
32 * @src_node: The Node ID of the sender.
33 * @dst_node: The Node ID of the intended receiver.
34 * @status: IPC buffer usage status
35 */
36struct ivpu_ipc_hdr {
37	u32 data_addr;
38	u32 data_size;
39	u16 channel;
40	u8 src_node;
41	u8 dst_node;
42	u8 status;
43} __packed __aligned(IVPU_IPC_ALIGNMENT);
44
45struct ivpu_ipc_consumer {
46	struct list_head link;
47	u32 channel;
48	u32 tx_vpu_addr;
49	u32 request_id;
50
51	spinlock_t rx_msg_lock; /* Protects rx_msg_list */
52	struct list_head rx_msg_list;
53	wait_queue_head_t rx_msg_wq;
54};
55
56struct ivpu_ipc_info {
57	struct gen_pool *mm_tx;
58	struct ivpu_bo *mem_tx;
59	struct ivpu_bo *mem_rx;
60
61	atomic_t rx_msg_count;
62
63	spinlock_t cons_list_lock; /* Protects cons_list */
64	struct list_head cons_list;
65
66	atomic_t request_id;
67	struct mutex lock; /* Lock on status */
68	bool on;
69};
70
71int ivpu_ipc_init(struct ivpu_device *vdev);
72void ivpu_ipc_fini(struct ivpu_device *vdev);
73
74void ivpu_ipc_enable(struct ivpu_device *vdev);
75void ivpu_ipc_disable(struct ivpu_device *vdev);
76void ivpu_ipc_reset(struct ivpu_device *vdev);
77
78int ivpu_ipc_irq_handler(struct ivpu_device *vdev);
79
80void ivpu_ipc_consumer_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
81			   u32 channel);
82void ivpu_ipc_consumer_del(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons);
83
84int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
85		     struct ivpu_ipc_hdr *ipc_buf, struct vpu_jsm_msg *ipc_payload,
86		     unsigned long timeout_ms);
87
88int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
89			  enum vpu_ipc_msg_type expected_resp_type,
90			  struct vpu_jsm_msg *resp, u32 channel,
91			  unsigned long timeout_ms);
92
93#endif /* __IVPU_IPC_H__ */
94