162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci 362306a36Sopenharmony_ci/* 462306a36Sopenharmony_ci * Copyright 2016-2019 HabanaLabs, Ltd. 562306a36Sopenharmony_ci * All Rights Reserved. 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include "goyaP.h" 962306a36Sopenharmony_ci#include "../include/goya/asic_reg/goya_regs.h" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/* 1262306a36Sopenharmony_ci * goya_set_block_as_protected - set the given block as protected 1362306a36Sopenharmony_ci * 1462306a36Sopenharmony_ci * @hdev: pointer to hl_device structure 1562306a36Sopenharmony_ci * @block: block base address 1662306a36Sopenharmony_ci * 1762306a36Sopenharmony_ci */ 1862306a36Sopenharmony_cistatic void goya_pb_set_block(struct hl_device *hdev, u64 base) 1962306a36Sopenharmony_ci{ 2062306a36Sopenharmony_ci u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci while (pb_addr & 0xFFF) { 2362306a36Sopenharmony_ci WREG32(pb_addr, 0); 2462306a36Sopenharmony_ci pb_addr += 4; 2562306a36Sopenharmony_ci } 2662306a36Sopenharmony_ci} 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_cistatic void goya_init_mme_protection_bits(struct hl_device *hdev) 2962306a36Sopenharmony_ci{ 3062306a36Sopenharmony_ci u32 pb_addr, mask; 3162306a36Sopenharmony_ci u8 word_offset; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci /* TODO: change to real reg name when Soc Online is updated */ 3462306a36Sopenharmony_ci u64 mmMME_SBB_POWER_ECO1 = 0xDFF60, 3562306a36Sopenharmony_ci mmMME_SBB_POWER_ECO2 = 0xDFF64; 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_0_BASE); 3862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_1_BASE); 3962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_2_BASE); 4062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_3_BASE); 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSBA_ECC_MEM_BASE); 4362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSBB_ECC_MEM_BASE); 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_RTR_BASE); 4662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_RD_REGULATOR_BASE); 4762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME1_WR_REGULATOR_BASE); 4862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_RTR_BASE); 4962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_RD_REGULATOR_BASE); 5062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME2_WR_REGULATOR_BASE); 5162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_RTR_BASE); 5262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_RD_REGULATOR_BASE); 5362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME3_WR_REGULATOR_BASE); 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_RTR_BASE); 5662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_RD_REGULATOR_BASE); 5762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME4_WR_REGULATOR_BASE); 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_RTR_BASE); 6062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_RD_REGULATOR_BASE); 6162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME5_WR_REGULATOR_BASE); 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_RTR_BASE); 6462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_RD_REGULATOR_BASE); 6562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmMME6_WR_REGULATOR_BASE); 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci pb_addr = (mmMME_DUMMY & ~0xFFF) + PROT_BITS_OFFS; 6862306a36Sopenharmony_ci word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; 6962306a36Sopenharmony_ci mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); 7062306a36Sopenharmony_ci mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); 7162306a36Sopenharmony_ci mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); 7262306a36Sopenharmony_ci mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 7362306a36Sopenharmony_ci mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 7462306a36Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_ADD & 0x7F) >> 2); 7562306a36Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_DATA_WR & 0x7F) >> 2); 7662306a36Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_DATA_RD & 0x7F) >> 2); 7762306a36Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_CTRL & 0x7F) >> 2); 7862306a36Sopenharmony_ci mask |= 1 << ((mmMME_DBGMEM_RC & 0x7F) >> 2); 7962306a36Sopenharmony_ci mask |= 1 << ((mmMME_LOG_SHADOW & 0x7F) >> 2); 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci pb_addr = (mmMME_STORE_MAX_CREDIT & ~0xFFF) + PROT_BITS_OFFS; 8462306a36Sopenharmony_ci word_offset = ((mmMME_STORE_MAX_CREDIT & PROT_BITS_OFFS) >> 7) << 2; 8562306a36Sopenharmony_ci mask = 1 << ((mmMME_STORE_MAX_CREDIT & 0x7F) >> 2); 8662306a36Sopenharmony_ci mask |= 1 << ((mmMME_AGU & 0x7F) >> 2); 8762306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBA & 0x7F) >> 2); 8862306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBB & 0x7F) >> 2); 8962306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBC & 0x7F) >> 2); 9062306a36Sopenharmony_ci mask |= 1 << ((mmMME_WBC & 0x7F) >> 2); 9162306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBA_CONTROL_DATA & 0x7F) >> 2); 9262306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBB_CONTROL_DATA & 0x7F) >> 2); 9362306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBC_CONTROL_DATA & 0x7F) >> 2); 9462306a36Sopenharmony_ci mask |= 1 << ((mmMME_WBC_CONTROL_DATA & 0x7F) >> 2); 9562306a36Sopenharmony_ci mask |= 1 << ((mmMME_TE & 0x7F) >> 2); 9662306a36Sopenharmony_ci mask |= 1 << ((mmMME_TE2DEC & 0x7F) >> 2); 9762306a36Sopenharmony_ci mask |= 1 << ((mmMME_REI_STATUS & 0x7F) >> 2); 9862306a36Sopenharmony_ci mask |= 1 << ((mmMME_REI_MASK & 0x7F) >> 2); 9962306a36Sopenharmony_ci mask |= 1 << ((mmMME_SEI_STATUS & 0x7F) >> 2); 10062306a36Sopenharmony_ci mask |= 1 << ((mmMME_SEI_MASK & 0x7F) >> 2); 10162306a36Sopenharmony_ci mask |= 1 << ((mmMME_SPI_STATUS & 0x7F) >> 2); 10262306a36Sopenharmony_ci mask |= 1 << ((mmMME_SPI_MASK & 0x7F) >> 2); 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci pb_addr = (mmMME_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 10762306a36Sopenharmony_ci word_offset = ((mmMME_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 10862306a36Sopenharmony_ci mask = 1 << ((mmMME_QM_GLBL_CFG0 & 0x7F) >> 2); 10962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_CFG1 & 0x7F) >> 2); 11062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_PROT & 0x7F) >> 2); 11162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_CFG & 0x7F) >> 2); 11262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 11362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 11462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 11562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 11662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 11762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_STS0 & 0x7F) >> 2); 11862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_GLBL_STS1 & 0x7F) >> 2); 11962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BASE_LO & 0x7F) >> 2); 12062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BASE_HI & 0x7F) >> 2); 12162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_SIZE & 0x7F) >> 2); 12262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PI & 0x7F) >> 2); 12362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CI & 0x7F) >> 2); 12462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CFG0 & 0x7F) >> 2); 12562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_CFG1 & 0x7F) >> 2); 12662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_ARUSER & 0x7F) >> 2); 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci pb_addr = (mmMME_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 13162306a36Sopenharmony_ci word_offset = ((mmMME_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 13262306a36Sopenharmony_ci mask = 1 << ((mmMME_QM_PQ_PUSH0 & 0x7F) >> 2); 13362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH1 & 0x7F) >> 2); 13462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH2 & 0x7F) >> 2); 13562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_PUSH3 & 0x7F) >> 2); 13662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_STS0 & 0x7F) >> 2); 13762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_STS1 & 0x7F) >> 2); 13862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 13962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 14062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 14162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 14262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CFG0 & 0x7F) >> 2); 14362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CFG1 & 0x7F) >> 2); 14462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_ARUSER & 0x7F) >> 2); 14562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_LO & 0x7F) >> 2); 14662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_HI & 0x7F) >> 2); 14762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_TSIZE & 0x7F) >> 2); 14862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CTL & 0x7F) >> 2); 14962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 15062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 15162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_TSIZE_STS & 0x7F) >> 2); 15262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_CTL_STS & 0x7F) >> 2); 15362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_STS0 & 0x7F) >> 2); 15462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_STS1 & 0x7F) >> 2); 15562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 15662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 15762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 15862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 16162306a36Sopenharmony_ci 16262306a36Sopenharmony_ci pb_addr = (mmMME_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 16362306a36Sopenharmony_ci word_offset = ((mmMME_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 16462306a36Sopenharmony_ci mask = 1 << ((mmMME_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 16562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 16662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 16762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 16862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 16962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 17062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 17162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 17262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 17362306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 17462306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 17562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 17662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 17762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 17862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 17962306a36Sopenharmony_ci 18062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 18162306a36Sopenharmony_ci 18262306a36Sopenharmony_ci pb_addr = (mmMME_QM_CP_STS & ~0xFFF) + PROT_BITS_OFFS; 18362306a36Sopenharmony_ci word_offset = ((mmMME_QM_CP_STS & PROT_BITS_OFFS) >> 7) << 2; 18462306a36Sopenharmony_ci mask = 1 << ((mmMME_QM_CP_STS & 0x7F) >> 2); 18562306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_CURRENT_INST_LO & 0x7F) >> 2); 18662306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_CURRENT_INST_HI & 0x7F) >> 2); 18762306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_BARRIER_CFG & 0x7F) >> 2); 18862306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CP_DBG_0 & 0x7F) >> 2); 18962306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BUF_ADDR & 0x7F) >> 2); 19062306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_PQ_BUF_RDATA & 0x7F) >> 2); 19162306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_BUF_ADDR & 0x7F) >> 2); 19262306a36Sopenharmony_ci mask |= 1 << ((mmMME_QM_CQ_BUF_RDATA & 0x7F) >> 2); 19362306a36Sopenharmony_ci 19462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci pb_addr = (mmMME_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 19762306a36Sopenharmony_ci word_offset = ((mmMME_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 19862306a36Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 19962306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 20062306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_PROT & 0x7F) >> 2); 20162306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 20262306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 20362306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 20462306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 20562306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 20662306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 20762306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_STS0 & 0x7F) >> 2); 20862306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_GLBL_STS1 & 0x7F) >> 2); 20962306a36Sopenharmony_ci 21062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 21162306a36Sopenharmony_ci 21262306a36Sopenharmony_ci pb_addr = (mmMME_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 21362306a36Sopenharmony_ci word_offset = ((mmMME_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 21462306a36Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CQ_CFG0 & 0x7F) >> 2); 21562306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_CFG1 & 0x7F) >> 2); 21662306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_ARUSER & 0x7F) >> 2); 21762306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 21862306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 21962306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 22062306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 22162306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_STS0 & 0x7F) >> 2); 22262306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_STS1 & 0x7F) >> 2); 22362306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 22462306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 22562306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 22662306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 22762306a36Sopenharmony_ci 22862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci pb_addr = (mmMME_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 23162306a36Sopenharmony_ci word_offset = ((mmMME_CMDQ_CQ_IFIFO_CNT & 23262306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 23362306a36Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 23462306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 23562306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 23662306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 23762306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 23862306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 23962306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 24062306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 24162306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 24262306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 24362306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 24462306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 24562306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 24662306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 24762306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 24862306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_STS & 0x7F) >> 2); 24962306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 25062306a36Sopenharmony_ci 25162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 25262306a36Sopenharmony_ci 25362306a36Sopenharmony_ci pb_addr = (mmMME_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 25462306a36Sopenharmony_ci word_offset = ((mmMME_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 25562306a36Sopenharmony_ci << 2; 25662306a36Sopenharmony_ci mask = 1 << ((mmMME_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 25762306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 25862306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CP_DBG_0 & 0x7F) >> 2); 25962306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 26062306a36Sopenharmony_ci mask |= 1 << ((mmMME_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 26162306a36Sopenharmony_ci 26262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 26362306a36Sopenharmony_ci 26462306a36Sopenharmony_ci pb_addr = (mmMME_SBB_POWER_ECO1 & ~0xFFF) + PROT_BITS_OFFS; 26562306a36Sopenharmony_ci word_offset = ((mmMME_SBB_POWER_ECO1 & PROT_BITS_OFFS) >> 7) << 2; 26662306a36Sopenharmony_ci mask = 1 << ((mmMME_SBB_POWER_ECO1 & 0x7F) >> 2); 26762306a36Sopenharmony_ci mask |= 1 << ((mmMME_SBB_POWER_ECO2 & 0x7F) >> 2); 26862306a36Sopenharmony_ci 26962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 27062306a36Sopenharmony_ci} 27162306a36Sopenharmony_ci 27262306a36Sopenharmony_cistatic void goya_init_dma_protection_bits(struct hl_device *hdev) 27362306a36Sopenharmony_ci{ 27462306a36Sopenharmony_ci u32 pb_addr, mask; 27562306a36Sopenharmony_ci u8 word_offset; 27662306a36Sopenharmony_ci 27762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_NRTR_BASE); 27862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_RD_REGULATOR_BASE); 27962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_WR_REGULATOR_BASE); 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ci pb_addr = (mmDMA_QM_0_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 28262306a36Sopenharmony_ci word_offset = ((mmDMA_QM_0_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 28362306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_GLBL_CFG0 & 0x7F) >> 2); 28462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_CFG1 & 0x7F) >> 2); 28562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_PROT & 0x7F) >> 2); 28662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_CFG & 0x7F) >> 2); 28762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 28862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 28962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_ERR_WDATA & 0x7F) >> 2); 29062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_SECURE_PROPS & 0x7F) >> 2); 29162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 29262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_STS0 & 0x7F) >> 2); 29362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_GLBL_STS1 & 0x7F) >> 2); 29462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_BASE_LO & 0x7F) >> 2); 29562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_BASE_HI & 0x7F) >> 2); 29662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_SIZE & 0x7F) >> 2); 29762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PI & 0x7F) >> 2); 29862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CI & 0x7F) >> 2); 29962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CFG0 & 0x7F) >> 2); 30062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_CFG1 & 0x7F) >> 2); 30162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_ARUSER & 0x7F) >> 2); 30262306a36Sopenharmony_ci 30362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 30462306a36Sopenharmony_ci 30562306a36Sopenharmony_ci pb_addr = (mmDMA_QM_0_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 30662306a36Sopenharmony_ci word_offset = ((mmDMA_QM_0_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 30762306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_PQ_PUSH0 & 0x7F) >> 2); 30862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH1 & 0x7F) >> 2); 30962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH2 & 0x7F) >> 2); 31062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_PUSH3 & 0x7F) >> 2); 31162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_STS0 & 0x7F) >> 2); 31262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_STS1 & 0x7F) >> 2); 31362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 31462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 31562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 31662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 31762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CFG0 & 0x7F) >> 2); 31862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CFG1 & 0x7F) >> 2); 31962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_ARUSER & 0x7F) >> 2); 32062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_LO & 0x7F) >> 2); 32162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_HI & 0x7F) >> 2); 32262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_TSIZE & 0x7F) >> 2); 32362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CTL & 0x7F) >> 2); 32462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_LO_STS & 0x7F) >> 2); 32562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_PTR_HI_STS & 0x7F) >> 2); 32662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_TSIZE_STS & 0x7F) >> 2); 32762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_CTL_STS & 0x7F) >> 2); 32862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_STS0 & 0x7F) >> 2); 32962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_STS1 & 0x7F) >> 2); 33062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 33162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 33262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 33362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 33462306a36Sopenharmony_ci 33562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 33662306a36Sopenharmony_ci 33762306a36Sopenharmony_ci pb_addr = (mmDMA_QM_0_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 33862306a36Sopenharmony_ci word_offset = ((mmDMA_QM_0_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 33962306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_0_CQ_IFIFO_CNT & 0x7F) >> 2); 34062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 34162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 34262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 34362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 34462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 34562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 34662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 34762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 34862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 34962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 35062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 35162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 35262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 35362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_0_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 35462306a36Sopenharmony_ci 35562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 35662306a36Sopenharmony_ci 35762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_0_BASE); 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_ci pb_addr = (mmDMA_QM_1_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 36062306a36Sopenharmony_ci word_offset = ((mmDMA_QM_1_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 36162306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_GLBL_CFG0 & 0x7F) >> 2); 36262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_CFG1 & 0x7F) >> 2); 36362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_PROT & 0x7F) >> 2); 36462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_CFG & 0x7F) >> 2); 36562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 36662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 36762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_ERR_WDATA & 0x7F) >> 2); 36862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_SECURE_PROPS & 0x7F) >> 2); 36962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 37062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_STS0 & 0x7F) >> 2); 37162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_GLBL_STS1 & 0x7F) >> 2); 37262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_BASE_LO & 0x7F) >> 2); 37362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_BASE_HI & 0x7F) >> 2); 37462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_SIZE & 0x7F) >> 2); 37562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PI & 0x7F) >> 2); 37662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CI & 0x7F) >> 2); 37762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CFG0 & 0x7F) >> 2); 37862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_CFG1 & 0x7F) >> 2); 37962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_ARUSER & 0x7F) >> 2); 38062306a36Sopenharmony_ci 38162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 38262306a36Sopenharmony_ci 38362306a36Sopenharmony_ci pb_addr = (mmDMA_QM_1_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 38462306a36Sopenharmony_ci word_offset = ((mmDMA_QM_1_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 38562306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_PQ_PUSH0 & 0x7F) >> 2); 38662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH1 & 0x7F) >> 2); 38762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH2 & 0x7F) >> 2); 38862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_PUSH3 & 0x7F) >> 2); 38962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_STS0 & 0x7F) >> 2); 39062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_STS1 & 0x7F) >> 2); 39162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 39262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 39362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 39462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 39562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CFG0 & 0x7F) >> 2); 39662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CFG1 & 0x7F) >> 2); 39762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_ARUSER & 0x7F) >> 2); 39862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_LO & 0x7F) >> 2); 39962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_HI & 0x7F) >> 2); 40062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_TSIZE & 0x7F) >> 2); 40162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CTL & 0x7F) >> 2); 40262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_LO_STS & 0x7F) >> 2); 40362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_PTR_HI_STS & 0x7F) >> 2); 40462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_TSIZE_STS & 0x7F) >> 2); 40562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_CTL_STS & 0x7F) >> 2); 40662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_STS0 & 0x7F) >> 2); 40762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_STS1 & 0x7F) >> 2); 40862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 40962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 41062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 41162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 41262306a36Sopenharmony_ci 41362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 41462306a36Sopenharmony_ci 41562306a36Sopenharmony_ci pb_addr = (mmDMA_QM_1_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 41662306a36Sopenharmony_ci word_offset = ((mmDMA_QM_1_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 41762306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_1_CQ_IFIFO_CNT & 0x7F) >> 2); 41862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 41962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 42062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 42162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 42262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 42362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 42462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 42562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 42662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 42762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 42862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 42962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 43062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 43162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_1_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 43262306a36Sopenharmony_ci 43362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 43462306a36Sopenharmony_ci 43562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_1_BASE); 43662306a36Sopenharmony_ci 43762306a36Sopenharmony_ci pb_addr = (mmDMA_QM_2_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 43862306a36Sopenharmony_ci word_offset = ((mmDMA_QM_2_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 43962306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_GLBL_CFG0 & 0x7F) >> 2); 44062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_CFG1 & 0x7F) >> 2); 44162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_PROT & 0x7F) >> 2); 44262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_CFG & 0x7F) >> 2); 44362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 44462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 44562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_ERR_WDATA & 0x7F) >> 2); 44662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_SECURE_PROPS & 0x7F) >> 2); 44762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 44862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_STS0 & 0x7F) >> 2); 44962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_GLBL_STS1 & 0x7F) >> 2); 45062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_BASE_LO & 0x7F) >> 2); 45162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_BASE_HI & 0x7F) >> 2); 45262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_SIZE & 0x7F) >> 2); 45362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PI & 0x7F) >> 2); 45462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CI & 0x7F) >> 2); 45562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CFG0 & 0x7F) >> 2); 45662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_CFG1 & 0x7F) >> 2); 45762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_ARUSER & 0x7F) >> 2); 45862306a36Sopenharmony_ci 45962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 46062306a36Sopenharmony_ci 46162306a36Sopenharmony_ci pb_addr = (mmDMA_QM_2_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 46262306a36Sopenharmony_ci word_offset = ((mmDMA_QM_2_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 46362306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_PQ_PUSH0 & 0x7F) >> 2); 46462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH1 & 0x7F) >> 2); 46562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH2 & 0x7F) >> 2); 46662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_PUSH3 & 0x7F) >> 2); 46762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_STS0 & 0x7F) >> 2); 46862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_STS1 & 0x7F) >> 2); 46962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 47062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 47162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 47262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 47362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CFG0 & 0x7F) >> 2); 47462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CFG1 & 0x7F) >> 2); 47562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_ARUSER & 0x7F) >> 2); 47662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_LO & 0x7F) >> 2); 47762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_HI & 0x7F) >> 2); 47862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_TSIZE & 0x7F) >> 2); 47962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CTL & 0x7F) >> 2); 48062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_LO_STS & 0x7F) >> 2); 48162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_PTR_HI_STS & 0x7F) >> 2); 48262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_TSIZE_STS & 0x7F) >> 2); 48362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_CTL_STS & 0x7F) >> 2); 48462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_STS0 & 0x7F) >> 2); 48562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_STS1 & 0x7F) >> 2); 48662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 48762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 48862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 48962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 49062306a36Sopenharmony_ci 49162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 49262306a36Sopenharmony_ci 49362306a36Sopenharmony_ci pb_addr = (mmDMA_QM_2_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 49462306a36Sopenharmony_ci word_offset = ((mmDMA_QM_2_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 49562306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_2_CQ_IFIFO_CNT & 0x7F) >> 2); 49662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 49762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 49862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 49962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 50062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 50162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 50262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 50362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 50462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 50562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 50662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 50762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 50862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 50962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_2_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 51062306a36Sopenharmony_ci 51162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 51262306a36Sopenharmony_ci 51362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_2_BASE); 51462306a36Sopenharmony_ci 51562306a36Sopenharmony_ci pb_addr = (mmDMA_QM_3_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 51662306a36Sopenharmony_ci word_offset = ((mmDMA_QM_3_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 51762306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_GLBL_CFG0 & 0x7F) >> 2); 51862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_CFG1 & 0x7F) >> 2); 51962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_PROT & 0x7F) >> 2); 52062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_CFG & 0x7F) >> 2); 52162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 52262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 52362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_ERR_WDATA & 0x7F) >> 2); 52462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_SECURE_PROPS & 0x7F) >> 2); 52562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 52662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_STS0 & 0x7F) >> 2); 52762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_GLBL_STS1 & 0x7F) >> 2); 52862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_BASE_LO & 0x7F) >> 2); 52962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_BASE_HI & 0x7F) >> 2); 53062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_SIZE & 0x7F) >> 2); 53162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PI & 0x7F) >> 2); 53262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CI & 0x7F) >> 2); 53362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CFG0 & 0x7F) >> 2); 53462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_CFG1 & 0x7F) >> 2); 53562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_ARUSER & 0x7F) >> 2); 53662306a36Sopenharmony_ci 53762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 53862306a36Sopenharmony_ci 53962306a36Sopenharmony_ci pb_addr = (mmDMA_QM_3_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 54062306a36Sopenharmony_ci word_offset = ((mmDMA_QM_3_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 54162306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_PQ_PUSH0 & 0x7F) >> 2); 54262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH1 & 0x7F) >> 2); 54362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH2 & 0x7F) >> 2); 54462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_PUSH3 & 0x7F) >> 2); 54562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_STS0 & 0x7F) >> 2); 54662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_STS1 & 0x7F) >> 2); 54762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 54862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 54962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 55062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 55162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CFG0 & 0x7F) >> 2); 55262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CFG1 & 0x7F) >> 2); 55362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_ARUSER & 0x7F) >> 2); 55462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_LO & 0x7F) >> 2); 55562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_HI & 0x7F) >> 2); 55662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_TSIZE & 0x7F) >> 2); 55762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CTL & 0x7F) >> 2); 55862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_LO_STS & 0x7F) >> 2); 55962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_PTR_HI_STS & 0x7F) >> 2); 56062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_TSIZE_STS & 0x7F) >> 2); 56162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_CTL_STS & 0x7F) >> 2); 56262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_STS0 & 0x7F) >> 2); 56362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_STS1 & 0x7F) >> 2); 56462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 56562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 56662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 56762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 56862306a36Sopenharmony_ci 56962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 57062306a36Sopenharmony_ci 57162306a36Sopenharmony_ci pb_addr = (mmDMA_QM_3_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 57262306a36Sopenharmony_ci word_offset = ((mmDMA_QM_3_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 57362306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_3_CQ_IFIFO_CNT & 0x7F) >> 2); 57462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 57562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 57662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 57762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 57862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 57962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 58062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 58162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 58262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 58362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 58462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 58562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 58662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 58762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_3_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 58862306a36Sopenharmony_ci 58962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 59062306a36Sopenharmony_ci 59162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_3_BASE); 59262306a36Sopenharmony_ci 59362306a36Sopenharmony_ci pb_addr = (mmDMA_QM_4_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 59462306a36Sopenharmony_ci word_offset = ((mmDMA_QM_4_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 59562306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_GLBL_CFG0 & 0x7F) >> 2); 59662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_CFG1 & 0x7F) >> 2); 59762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_PROT & 0x7F) >> 2); 59862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_CFG & 0x7F) >> 2); 59962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 60062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 60162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_ERR_WDATA & 0x7F) >> 2); 60262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_SECURE_PROPS & 0x7F) >> 2); 60362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 60462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_STS0 & 0x7F) >> 2); 60562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_GLBL_STS1 & 0x7F) >> 2); 60662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_BASE_LO & 0x7F) >> 2); 60762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_BASE_HI & 0x7F) >> 2); 60862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_SIZE & 0x7F) >> 2); 60962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PI & 0x7F) >> 2); 61062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CI & 0x7F) >> 2); 61162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CFG0 & 0x7F) >> 2); 61262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_CFG1 & 0x7F) >> 2); 61362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_ARUSER & 0x7F) >> 2); 61462306a36Sopenharmony_ci 61562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 61662306a36Sopenharmony_ci 61762306a36Sopenharmony_ci pb_addr = (mmDMA_QM_4_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 61862306a36Sopenharmony_ci word_offset = ((mmDMA_QM_4_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 61962306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_PQ_PUSH0 & 0x7F) >> 2); 62062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH1 & 0x7F) >> 2); 62162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH2 & 0x7F) >> 2); 62262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_PUSH3 & 0x7F) >> 2); 62362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_STS0 & 0x7F) >> 2); 62462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_STS1 & 0x7F) >> 2); 62562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 62662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 62762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 62862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 62962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CFG0 & 0x7F) >> 2); 63062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CFG1 & 0x7F) >> 2); 63162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_ARUSER & 0x7F) >> 2); 63262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_LO & 0x7F) >> 2); 63362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_HI & 0x7F) >> 2); 63462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_TSIZE & 0x7F) >> 2); 63562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CTL & 0x7F) >> 2); 63662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_LO_STS & 0x7F) >> 2); 63762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_PTR_HI_STS & 0x7F) >> 2); 63862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_TSIZE_STS & 0x7F) >> 2); 63962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_CTL_STS & 0x7F) >> 2); 64062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_STS0 & 0x7F) >> 2); 64162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_STS1 & 0x7F) >> 2); 64262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 64362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 64462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 64562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 64662306a36Sopenharmony_ci 64762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 64862306a36Sopenharmony_ci 64962306a36Sopenharmony_ci pb_addr = (mmDMA_QM_4_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 65062306a36Sopenharmony_ci word_offset = ((mmDMA_QM_4_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 65162306a36Sopenharmony_ci mask = 1 << ((mmDMA_QM_4_CQ_IFIFO_CNT & 0x7F) >> 2); 65262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 65362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 65462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 65562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 65662306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 65762306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 65862306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 65962306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 66062306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 66162306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 66262306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 66362306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 66462306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 66562306a36Sopenharmony_ci mask |= 1 << ((mmDMA_QM_4_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 66662306a36Sopenharmony_ci 66762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 66862306a36Sopenharmony_ci 66962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmDMA_CH_4_BASE); 67062306a36Sopenharmony_ci} 67162306a36Sopenharmony_ci 67262306a36Sopenharmony_cistatic void goya_init_tpc_protection_bits(struct hl_device *hdev) 67362306a36Sopenharmony_ci{ 67462306a36Sopenharmony_ci u32 pb_addr, mask; 67562306a36Sopenharmony_ci u8 word_offset; 67662306a36Sopenharmony_ci 67762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_RD_REGULATOR_BASE); 67862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_WR_REGULATOR_BASE); 67962306a36Sopenharmony_ci 68062306a36Sopenharmony_ci pb_addr = (mmTPC0_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 68162306a36Sopenharmony_ci word_offset = ((mmTPC0_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 68262306a36Sopenharmony_ci 68362306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_SEMAPHORE & 0x7F) >> 2); 68462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2); 68562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2); 68662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_STATUS & 0x7F) >> 2); 68762306a36Sopenharmony_ci 68862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 68962306a36Sopenharmony_ci 69062306a36Sopenharmony_ci pb_addr = (mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 69162306a36Sopenharmony_ci word_offset = ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 69262306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 69362306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 69462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 69562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 69662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 69762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2); 69862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2); 69962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 70062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_TPC_INTR_MASK & 0x7F) >> 2); 70162306a36Sopenharmony_ci 70262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 70362306a36Sopenharmony_ci 70462306a36Sopenharmony_ci pb_addr = (mmTPC0_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 70562306a36Sopenharmony_ci word_offset = ((mmTPC0_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 70662306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_ARUSER & 0x7F) >> 2); 70762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_AWUSER & 0x7F) >> 2); 70862306a36Sopenharmony_ci 70962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 71062306a36Sopenharmony_ci 71162306a36Sopenharmony_ci pb_addr = (mmTPC0_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 71262306a36Sopenharmony_ci word_offset = ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 71362306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 71462306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 71562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 71662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 71762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 71862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 71962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 72062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 72162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 72262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 72362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 72462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 72562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 72662306a36Sopenharmony_ci 72762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 72862306a36Sopenharmony_ci 72962306a36Sopenharmony_ci pb_addr = (mmTPC0_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 73062306a36Sopenharmony_ci word_offset = ((mmTPC0_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 73162306a36Sopenharmony_ci mask = 1 << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2); 73262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_CFG1 & 0x7F) >> 2); 73362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_PROT & 0x7F) >> 2); 73462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_CFG & 0x7F) >> 2); 73562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 73662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 73762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 73862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 73962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 74062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_STS0 & 0x7F) >> 2); 74162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_GLBL_STS1 & 0x7F) >> 2); 74262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_BASE_LO & 0x7F) >> 2); 74362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_BASE_HI & 0x7F) >> 2); 74462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_SIZE & 0x7F) >> 2); 74562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PI & 0x7F) >> 2); 74662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CI & 0x7F) >> 2); 74762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CFG0 & 0x7F) >> 2); 74862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_CFG1 & 0x7F) >> 2); 74962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_ARUSER & 0x7F) >> 2); 75062306a36Sopenharmony_ci 75162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 75262306a36Sopenharmony_ci 75362306a36Sopenharmony_ci pb_addr = (mmTPC0_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 75462306a36Sopenharmony_ci word_offset = ((mmTPC0_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 75562306a36Sopenharmony_ci mask = 1 << ((mmTPC0_QM_PQ_PUSH0 & 0x7F) >> 2); 75662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH1 & 0x7F) >> 2); 75762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH2 & 0x7F) >> 2); 75862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_PUSH3 & 0x7F) >> 2); 75962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_STS0 & 0x7F) >> 2); 76062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_STS1 & 0x7F) >> 2); 76162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 76262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 76362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 76462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 76562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CFG0 & 0x7F) >> 2); 76662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CFG1 & 0x7F) >> 2); 76762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_ARUSER & 0x7F) >> 2); 76862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_LO & 0x7F) >> 2); 76962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_HI & 0x7F) >> 2); 77062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_TSIZE & 0x7F) >> 2); 77162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CTL & 0x7F) >> 2); 77262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 77362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 77462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_TSIZE_STS & 0x7F) >> 2); 77562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_CTL_STS & 0x7F) >> 2); 77662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_STS0 & 0x7F) >> 2); 77762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_STS1 & 0x7F) >> 2); 77862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 77962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 78062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 78162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 78262306a36Sopenharmony_ci 78362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 78462306a36Sopenharmony_ci 78562306a36Sopenharmony_ci pb_addr = (mmTPC0_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 78662306a36Sopenharmony_ci word_offset = ((mmTPC0_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 78762306a36Sopenharmony_ci mask = 1 << ((mmTPC0_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 78862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 78962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 79062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 79162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 79262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 79362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 79462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 79562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 79662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 79762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 79862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 79962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 80062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 80162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 80262306a36Sopenharmony_ci 80362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 80462306a36Sopenharmony_ci 80562306a36Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 80662306a36Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 80762306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 80862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 80962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_PROT & 0x7F) >> 2); 81062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 81162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 81262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 81362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 81462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 81562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 81662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_STS0 & 0x7F) >> 2); 81762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_GLBL_STS1 & 0x7F) >> 2); 81862306a36Sopenharmony_ci 81962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 82062306a36Sopenharmony_ci 82162306a36Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 82262306a36Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 82362306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CQ_CFG0 & 0x7F) >> 2); 82462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_CFG1 & 0x7F) >> 2); 82562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_ARUSER & 0x7F) >> 2); 82662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 82762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 82862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 82962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 83062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_STS0 & 0x7F) >> 2); 83162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_STS1 & 0x7F) >> 2); 83262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 83362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 83462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 83562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 83662306a36Sopenharmony_ci 83762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 83862306a36Sopenharmony_ci 83962306a36Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 84062306a36Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 84162306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 84262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 84362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 84462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 84562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 84662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 84762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 84862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 84962306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 85062306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 85162306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 85262306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 85362306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 85462306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 85562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 85662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_STS & 0x7F) >> 2); 85762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 85862306a36Sopenharmony_ci 85962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 86062306a36Sopenharmony_ci 86162306a36Sopenharmony_ci pb_addr = (mmTPC0_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 86262306a36Sopenharmony_ci word_offset = ((mmTPC0_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 86362306a36Sopenharmony_ci << 2; 86462306a36Sopenharmony_ci mask = 1 << ((mmTPC0_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 86562306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 86662306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CP_DBG_0 & 0x7F) >> 2); 86762306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 86862306a36Sopenharmony_ci mask |= 1 << ((mmTPC0_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 86962306a36Sopenharmony_ci 87062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 87162306a36Sopenharmony_ci 87262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_RTR_BASE); 87362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_RD_REGULATOR_BASE); 87462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC1_WR_REGULATOR_BASE); 87562306a36Sopenharmony_ci 87662306a36Sopenharmony_ci pb_addr = (mmTPC1_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 87762306a36Sopenharmony_ci word_offset = ((mmTPC1_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 87862306a36Sopenharmony_ci 87962306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_SEMAPHORE & 0x7F) >> 2); 88062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2); 88162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2); 88262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_STATUS & 0x7F) >> 2); 88362306a36Sopenharmony_ci 88462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 88562306a36Sopenharmony_ci 88662306a36Sopenharmony_ci pb_addr = (mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 88762306a36Sopenharmony_ci word_offset = ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 88862306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 88962306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 89062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 89162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 89262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 89362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2); 89462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2); 89562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 89662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_TPC_INTR_MASK & 0x7F) >> 2); 89762306a36Sopenharmony_ci 89862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 89962306a36Sopenharmony_ci 90062306a36Sopenharmony_ci pb_addr = (mmTPC1_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 90162306a36Sopenharmony_ci word_offset = ((mmTPC1_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 90262306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_ARUSER & 0x7F) >> 2); 90362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_AWUSER & 0x7F) >> 2); 90462306a36Sopenharmony_ci 90562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 90662306a36Sopenharmony_ci 90762306a36Sopenharmony_ci pb_addr = (mmTPC1_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 90862306a36Sopenharmony_ci word_offset = ((mmTPC1_CFG_FUNC_MBIST_CNTRL & PROT_BITS_OFFS) >> 7) 90962306a36Sopenharmony_ci << 2; 91062306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 91162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 91262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 91362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 91462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 91562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 91662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 91762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 91862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 91962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 92062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 92162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 92262306a36Sopenharmony_ci 92362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 92462306a36Sopenharmony_ci 92562306a36Sopenharmony_ci pb_addr = (mmTPC1_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 92662306a36Sopenharmony_ci word_offset = ((mmTPC1_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 92762306a36Sopenharmony_ci mask = 1 << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2); 92862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_CFG1 & 0x7F) >> 2); 92962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_PROT & 0x7F) >> 2); 93062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_CFG & 0x7F) >> 2); 93162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 93262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 93362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 93462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 93562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 93662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_STS0 & 0x7F) >> 2); 93762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_GLBL_STS1 & 0x7F) >> 2); 93862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_BASE_LO & 0x7F) >> 2); 93962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_BASE_HI & 0x7F) >> 2); 94062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_SIZE & 0x7F) >> 2); 94162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PI & 0x7F) >> 2); 94262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CI & 0x7F) >> 2); 94362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CFG0 & 0x7F) >> 2); 94462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_CFG1 & 0x7F) >> 2); 94562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_ARUSER & 0x7F) >> 2); 94662306a36Sopenharmony_ci 94762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 94862306a36Sopenharmony_ci 94962306a36Sopenharmony_ci pb_addr = (mmTPC1_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 95062306a36Sopenharmony_ci word_offset = ((mmTPC1_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 95162306a36Sopenharmony_ci mask = 1 << ((mmTPC1_QM_PQ_PUSH0 & 0x7F) >> 2); 95262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH1 & 0x7F) >> 2); 95362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH2 & 0x7F) >> 2); 95462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_PUSH3 & 0x7F) >> 2); 95562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_STS0 & 0x7F) >> 2); 95662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_STS1 & 0x7F) >> 2); 95762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 95862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 95962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 96062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 96162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CFG0 & 0x7F) >> 2); 96262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CFG1 & 0x7F) >> 2); 96362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_ARUSER & 0x7F) >> 2); 96462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_LO & 0x7F) >> 2); 96562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_HI & 0x7F) >> 2); 96662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_TSIZE & 0x7F) >> 2); 96762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CTL & 0x7F) >> 2); 96862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 96962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 97062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_TSIZE_STS & 0x7F) >> 2); 97162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_CTL_STS & 0x7F) >> 2); 97262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_STS0 & 0x7F) >> 2); 97362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_STS1 & 0x7F) >> 2); 97462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 97562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 97662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 97762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 97862306a36Sopenharmony_ci 97962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 98062306a36Sopenharmony_ci 98162306a36Sopenharmony_ci pb_addr = (mmTPC1_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 98262306a36Sopenharmony_ci word_offset = ((mmTPC1_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 98362306a36Sopenharmony_ci mask = 1 << ((mmTPC1_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 98462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 98562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 98662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 98762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 98862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 98962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 99062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 99162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 99262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 99362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 99462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 99562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 99662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 99762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 99862306a36Sopenharmony_ci 99962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 100062306a36Sopenharmony_ci 100162306a36Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 100262306a36Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 100362306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 100462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 100562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_PROT & 0x7F) >> 2); 100662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 100762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 100862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 100962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 101062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 101162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 101262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_STS0 & 0x7F) >> 2); 101362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_GLBL_STS1 & 0x7F) >> 2); 101462306a36Sopenharmony_ci 101562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 101662306a36Sopenharmony_ci 101762306a36Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 101862306a36Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 101962306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CQ_CFG0 & 0x7F) >> 2); 102062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_CFG1 & 0x7F) >> 2); 102162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_ARUSER & 0x7F) >> 2); 102262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 102362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 102462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 102562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 102662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_STS0 & 0x7F) >> 2); 102762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_STS1 & 0x7F) >> 2); 102862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 102962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 103062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 103162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 103262306a36Sopenharmony_ci 103362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 103462306a36Sopenharmony_ci 103562306a36Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 103662306a36Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 103762306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 103862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 103962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 104062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 104162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 104262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 104362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 104462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 104562306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 104662306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 104762306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 104862306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 104962306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 105062306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 105162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 105262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_STS & 0x7F) >> 2); 105362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 105462306a36Sopenharmony_ci 105562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 105662306a36Sopenharmony_ci 105762306a36Sopenharmony_ci pb_addr = (mmTPC1_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 105862306a36Sopenharmony_ci word_offset = ((mmTPC1_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 105962306a36Sopenharmony_ci << 2; 106062306a36Sopenharmony_ci mask = 1 << ((mmTPC1_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 106162306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 106262306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CP_DBG_0 & 0x7F) >> 2); 106362306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 106462306a36Sopenharmony_ci mask |= 1 << ((mmTPC1_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 106562306a36Sopenharmony_ci 106662306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 106762306a36Sopenharmony_ci 106862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_RTR_BASE); 106962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_RD_REGULATOR_BASE); 107062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC2_WR_REGULATOR_BASE); 107162306a36Sopenharmony_ci 107262306a36Sopenharmony_ci pb_addr = (mmTPC2_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 107362306a36Sopenharmony_ci word_offset = ((mmTPC2_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 107462306a36Sopenharmony_ci 107562306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_SEMAPHORE & 0x7F) >> 2); 107662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2); 107762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2); 107862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_STATUS & 0x7F) >> 2); 107962306a36Sopenharmony_ci 108062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 108162306a36Sopenharmony_ci 108262306a36Sopenharmony_ci pb_addr = (mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 108362306a36Sopenharmony_ci word_offset = ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 108462306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 108562306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 108662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 108762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 108862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 108962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2); 109062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2); 109162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 109262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_TPC_INTR_MASK & 0x7F) >> 2); 109362306a36Sopenharmony_ci 109462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 109562306a36Sopenharmony_ci 109662306a36Sopenharmony_ci pb_addr = (mmTPC2_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 109762306a36Sopenharmony_ci word_offset = ((mmTPC2_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 109862306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_ARUSER & 0x7F) >> 2); 109962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_AWUSER & 0x7F) >> 2); 110062306a36Sopenharmony_ci 110162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 110262306a36Sopenharmony_ci 110362306a36Sopenharmony_ci pb_addr = (mmTPC2_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 110462306a36Sopenharmony_ci word_offset = ((mmTPC2_CFG_FUNC_MBIST_CNTRL & PROT_BITS_OFFS) >> 7) 110562306a36Sopenharmony_ci << 2; 110662306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 110762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 110862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 110962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 111062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 111162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 111262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 111362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 111462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 111562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 111662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 111762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 111862306a36Sopenharmony_ci 111962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 112062306a36Sopenharmony_ci 112162306a36Sopenharmony_ci pb_addr = (mmTPC2_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 112262306a36Sopenharmony_ci word_offset = ((mmTPC2_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 112362306a36Sopenharmony_ci mask = 1 << ((mmTPC2_QM_GLBL_CFG0 & 0x7F) >> 2); 112462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_CFG1 & 0x7F) >> 2); 112562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_PROT & 0x7F) >> 2); 112662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_CFG & 0x7F) >> 2); 112762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 112862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 112962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 113062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 113162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 113262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_STS0 & 0x7F) >> 2); 113362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_GLBL_STS1 & 0x7F) >> 2); 113462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_BASE_LO & 0x7F) >> 2); 113562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_BASE_HI & 0x7F) >> 2); 113662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_SIZE & 0x7F) >> 2); 113762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PI & 0x7F) >> 2); 113862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CI & 0x7F) >> 2); 113962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CFG0 & 0x7F) >> 2); 114062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_CFG1 & 0x7F) >> 2); 114162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_ARUSER & 0x7F) >> 2); 114262306a36Sopenharmony_ci 114362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 114462306a36Sopenharmony_ci 114562306a36Sopenharmony_ci pb_addr = (mmTPC2_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 114662306a36Sopenharmony_ci word_offset = ((mmTPC2_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 114762306a36Sopenharmony_ci mask = 1 << ((mmTPC2_QM_PQ_PUSH0 & 0x7F) >> 2); 114862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH1 & 0x7F) >> 2); 114962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH2 & 0x7F) >> 2); 115062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_PUSH3 & 0x7F) >> 2); 115162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_STS0 & 0x7F) >> 2); 115262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_STS1 & 0x7F) >> 2); 115362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 115462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 115562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 115662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 115762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CFG0 & 0x7F) >> 2); 115862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CFG1 & 0x7F) >> 2); 115962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_ARUSER & 0x7F) >> 2); 116062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_LO & 0x7F) >> 2); 116162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_HI & 0x7F) >> 2); 116262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_TSIZE & 0x7F) >> 2); 116362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CTL & 0x7F) >> 2); 116462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 116562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 116662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_TSIZE_STS & 0x7F) >> 2); 116762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_CTL_STS & 0x7F) >> 2); 116862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_STS0 & 0x7F) >> 2); 116962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_STS1 & 0x7F) >> 2); 117062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 117162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 117262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 117362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 117462306a36Sopenharmony_ci 117562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 117662306a36Sopenharmony_ci 117762306a36Sopenharmony_ci pb_addr = (mmTPC2_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 117862306a36Sopenharmony_ci word_offset = ((mmTPC2_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 117962306a36Sopenharmony_ci mask = 1 << ((mmTPC2_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 118062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 118162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 118262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 118362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 118462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 118562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 118662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 118762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 118862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 118962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 119062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 119162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 119262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 119362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 119462306a36Sopenharmony_ci 119562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 119662306a36Sopenharmony_ci 119762306a36Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 119862306a36Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 119962306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 120062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 120162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_PROT & 0x7F) >> 2); 120262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 120362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 120462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 120562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 120662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 120762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 120862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_STS0 & 0x7F) >> 2); 120962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_GLBL_STS1 & 0x7F) >> 2); 121062306a36Sopenharmony_ci 121162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 121262306a36Sopenharmony_ci 121362306a36Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 121462306a36Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 121562306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CQ_CFG0 & 0x7F) >> 2); 121662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_CFG1 & 0x7F) >> 2); 121762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_ARUSER & 0x7F) >> 2); 121862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 121962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 122062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 122162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 122262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_STS0 & 0x7F) >> 2); 122362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_STS1 & 0x7F) >> 2); 122462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 122562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 122662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 122762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 122862306a36Sopenharmony_ci 122962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 123062306a36Sopenharmony_ci 123162306a36Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 123262306a36Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 123362306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 123462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 123562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 123662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 123762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 123862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 123962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 124062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 124162306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 124262306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 124362306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 124462306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 124562306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 124662306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 124762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 124862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_STS & 0x7F) >> 2); 124962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 125062306a36Sopenharmony_ci 125162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 125262306a36Sopenharmony_ci 125362306a36Sopenharmony_ci pb_addr = (mmTPC2_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 125462306a36Sopenharmony_ci word_offset = ((mmTPC2_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 125562306a36Sopenharmony_ci << 2; 125662306a36Sopenharmony_ci mask = 1 << ((mmTPC2_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 125762306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 125862306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CP_DBG_0 & 0x7F) >> 2); 125962306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 126062306a36Sopenharmony_ci mask |= 1 << ((mmTPC2_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 126162306a36Sopenharmony_ci 126262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 126362306a36Sopenharmony_ci 126462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_RTR_BASE); 126562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_RD_REGULATOR_BASE); 126662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC3_WR_REGULATOR_BASE); 126762306a36Sopenharmony_ci 126862306a36Sopenharmony_ci pb_addr = (mmTPC3_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 126962306a36Sopenharmony_ci word_offset = ((mmTPC3_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 127062306a36Sopenharmony_ci 127162306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_SEMAPHORE & 0x7F) >> 2); 127262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2); 127362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2); 127462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_STATUS & 0x7F) >> 2); 127562306a36Sopenharmony_ci 127662306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 127762306a36Sopenharmony_ci 127862306a36Sopenharmony_ci pb_addr = (mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 127962306a36Sopenharmony_ci word_offset = ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH 128062306a36Sopenharmony_ci & PROT_BITS_OFFS) >> 7) << 2; 128162306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 128262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 128362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 128462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 128562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2); 128662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2); 128762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 128862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_TPC_INTR_MASK & 0x7F) >> 2); 128962306a36Sopenharmony_ci 129062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 129162306a36Sopenharmony_ci 129262306a36Sopenharmony_ci pb_addr = (mmTPC3_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 129362306a36Sopenharmony_ci word_offset = ((mmTPC3_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 129462306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_ARUSER & 0x7F) >> 2); 129562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_AWUSER & 0x7F) >> 2); 129662306a36Sopenharmony_ci 129762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 129862306a36Sopenharmony_ci 129962306a36Sopenharmony_ci pb_addr = (mmTPC3_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 130062306a36Sopenharmony_ci word_offset = ((mmTPC3_CFG_FUNC_MBIST_CNTRL 130162306a36Sopenharmony_ci & PROT_BITS_OFFS) >> 7) << 2; 130262306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 130362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 130462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 130562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 130662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 130762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 130862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 130962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 131062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 131162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 131262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 131362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 131462306a36Sopenharmony_ci 131562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 131662306a36Sopenharmony_ci 131762306a36Sopenharmony_ci pb_addr = (mmTPC3_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 131862306a36Sopenharmony_ci word_offset = ((mmTPC3_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 131962306a36Sopenharmony_ci mask = 1 << ((mmTPC3_QM_GLBL_CFG0 & 0x7F) >> 2); 132062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2); 132162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_PROT & 0x7F) >> 2); 132262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_CFG & 0x7F) >> 2); 132362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 132462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 132562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 132662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 132762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 132862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_STS0 & 0x7F) >> 2); 132962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_GLBL_STS1 & 0x7F) >> 2); 133062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_BASE_LO & 0x7F) >> 2); 133162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_BASE_HI & 0x7F) >> 2); 133262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_SIZE & 0x7F) >> 2); 133362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PI & 0x7F) >> 2); 133462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CI & 0x7F) >> 2); 133562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CFG0 & 0x7F) >> 2); 133662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_CFG1 & 0x7F) >> 2); 133762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_ARUSER & 0x7F) >> 2); 133862306a36Sopenharmony_ci 133962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 134062306a36Sopenharmony_ci 134162306a36Sopenharmony_ci pb_addr = (mmTPC3_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 134262306a36Sopenharmony_ci word_offset = ((mmTPC3_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 134362306a36Sopenharmony_ci mask = 1 << ((mmTPC3_QM_PQ_PUSH0 & 0x7F) >> 2); 134462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH1 & 0x7F) >> 2); 134562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH2 & 0x7F) >> 2); 134662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_PUSH3 & 0x7F) >> 2); 134762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_STS0 & 0x7F) >> 2); 134862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_STS1 & 0x7F) >> 2); 134962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 135062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 135162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 135262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 135362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CFG0 & 0x7F) >> 2); 135462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CFG1 & 0x7F) >> 2); 135562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_ARUSER & 0x7F) >> 2); 135662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_LO & 0x7F) >> 2); 135762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_HI & 0x7F) >> 2); 135862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_TSIZE & 0x7F) >> 2); 135962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CTL & 0x7F) >> 2); 136062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 136162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 136262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_TSIZE_STS & 0x7F) >> 2); 136362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_CTL_STS & 0x7F) >> 2); 136462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_STS0 & 0x7F) >> 2); 136562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_STS1 & 0x7F) >> 2); 136662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 136762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 136862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 136962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 137062306a36Sopenharmony_ci 137162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 137262306a36Sopenharmony_ci 137362306a36Sopenharmony_ci pb_addr = (mmTPC3_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 137462306a36Sopenharmony_ci word_offset = ((mmTPC3_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 137562306a36Sopenharmony_ci mask = 1 << ((mmTPC3_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 137662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 137762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 137862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 137962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 138062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 138162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 138262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 138362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 138462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 138562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 138662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 138762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 138862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 138962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 139062306a36Sopenharmony_ci 139162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 139262306a36Sopenharmony_ci 139362306a36Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 139462306a36Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 139562306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 139662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 139762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_PROT & 0x7F) >> 2); 139862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 139962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 140062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 140162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 140262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 140362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 140462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_STS0 & 0x7F) >> 2); 140562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_GLBL_STS1 & 0x7F) >> 2); 140662306a36Sopenharmony_ci 140762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 140862306a36Sopenharmony_ci 140962306a36Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 141062306a36Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 141162306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CQ_CFG0 & 0x7F) >> 2); 141262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_CFG1 & 0x7F) >> 2); 141362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_ARUSER & 0x7F) >> 2); 141462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 141562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 141662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 141762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 141862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_STS0 & 0x7F) >> 2); 141962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_STS1 & 0x7F) >> 2); 142062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 142162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 142262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 142362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 142462306a36Sopenharmony_ci 142562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 142662306a36Sopenharmony_ci 142762306a36Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 142862306a36Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 142962306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 143062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 143162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 143262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 143362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 143462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 143562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 143662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 143762306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 143862306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 143962306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 144062306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 144162306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 144262306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 144362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 144462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_STS & 0x7F) >> 2); 144562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 144662306a36Sopenharmony_ci 144762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 144862306a36Sopenharmony_ci 144962306a36Sopenharmony_ci pb_addr = (mmTPC3_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 145062306a36Sopenharmony_ci word_offset = ((mmTPC3_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 145162306a36Sopenharmony_ci << 2; 145262306a36Sopenharmony_ci mask = 1 << ((mmTPC3_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 145362306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 145462306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CP_DBG_0 & 0x7F) >> 2); 145562306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 145662306a36Sopenharmony_ci mask |= 1 << ((mmTPC3_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 145762306a36Sopenharmony_ci 145862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 145962306a36Sopenharmony_ci 146062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_RTR_BASE); 146162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_RD_REGULATOR_BASE); 146262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC4_WR_REGULATOR_BASE); 146362306a36Sopenharmony_ci 146462306a36Sopenharmony_ci pb_addr = (mmTPC4_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 146562306a36Sopenharmony_ci word_offset = ((mmTPC4_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 146662306a36Sopenharmony_ci 146762306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_SEMAPHORE & 0x7F) >> 2); 146862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2); 146962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2); 147062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_STATUS & 0x7F) >> 2); 147162306a36Sopenharmony_ci 147262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 147362306a36Sopenharmony_ci 147462306a36Sopenharmony_ci pb_addr = (mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 147562306a36Sopenharmony_ci word_offset = ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 147662306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 147762306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 147862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 147962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 148062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 148162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2); 148262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2); 148362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 148462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_TPC_INTR_MASK & 0x7F) >> 2); 148562306a36Sopenharmony_ci 148662306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 148762306a36Sopenharmony_ci 148862306a36Sopenharmony_ci pb_addr = (mmTPC4_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 148962306a36Sopenharmony_ci word_offset = ((mmTPC4_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 149062306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_ARUSER & 0x7F) >> 2); 149162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_AWUSER & 0x7F) >> 2); 149262306a36Sopenharmony_ci 149362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 149462306a36Sopenharmony_ci 149562306a36Sopenharmony_ci pb_addr = (mmTPC4_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 149662306a36Sopenharmony_ci word_offset = ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 149762306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 149862306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 149962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 150062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 150162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 150262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 150362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 150462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 150562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 150662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 150762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 150862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 150962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 151062306a36Sopenharmony_ci 151162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 151262306a36Sopenharmony_ci 151362306a36Sopenharmony_ci pb_addr = (mmTPC4_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 151462306a36Sopenharmony_ci word_offset = ((mmTPC4_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 151562306a36Sopenharmony_ci mask = 1 << ((mmTPC4_QM_GLBL_CFG0 & 0x7F) >> 2); 151662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_CFG1 & 0x7F) >> 2); 151762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_PROT & 0x7F) >> 2); 151862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_CFG & 0x7F) >> 2); 151962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 152062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 152162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 152262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 152362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 152462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_STS0 & 0x7F) >> 2); 152562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_GLBL_STS1 & 0x7F) >> 2); 152662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_BASE_LO & 0x7F) >> 2); 152762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_BASE_HI & 0x7F) >> 2); 152862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_SIZE & 0x7F) >> 2); 152962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PI & 0x7F) >> 2); 153062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CI & 0x7F) >> 2); 153162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CFG0 & 0x7F) >> 2); 153262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_CFG1 & 0x7F) >> 2); 153362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_ARUSER & 0x7F) >> 2); 153462306a36Sopenharmony_ci 153562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 153662306a36Sopenharmony_ci 153762306a36Sopenharmony_ci pb_addr = (mmTPC4_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 153862306a36Sopenharmony_ci word_offset = ((mmTPC4_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 153962306a36Sopenharmony_ci mask = 1 << ((mmTPC4_QM_PQ_PUSH0 & 0x7F) >> 2); 154062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH1 & 0x7F) >> 2); 154162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH2 & 0x7F) >> 2); 154262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_PUSH3 & 0x7F) >> 2); 154362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_STS0 & 0x7F) >> 2); 154462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_STS1 & 0x7F) >> 2); 154562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 154662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 154762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 154862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 154962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CFG0 & 0x7F) >> 2); 155062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CFG1 & 0x7F) >> 2); 155162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_ARUSER & 0x7F) >> 2); 155262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_LO & 0x7F) >> 2); 155362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_HI & 0x7F) >> 2); 155462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_TSIZE & 0x7F) >> 2); 155562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CTL & 0x7F) >> 2); 155662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 155762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 155862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_TSIZE_STS & 0x7F) >> 2); 155962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_CTL_STS & 0x7F) >> 2); 156062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_STS0 & 0x7F) >> 2); 156162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_STS1 & 0x7F) >> 2); 156262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 156362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 156462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 156562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 156662306a36Sopenharmony_ci 156762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 156862306a36Sopenharmony_ci 156962306a36Sopenharmony_ci pb_addr = (mmTPC4_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 157062306a36Sopenharmony_ci word_offset = ((mmTPC4_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 157162306a36Sopenharmony_ci mask = 1 << ((mmTPC4_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 157262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 157362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 157462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 157562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 157662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 157762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 157862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 157962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 158062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 158162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 158262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 158362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 158462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 158562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 158662306a36Sopenharmony_ci 158762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 158862306a36Sopenharmony_ci 158962306a36Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 159062306a36Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 159162306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 159262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 159362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_PROT & 0x7F) >> 2); 159462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 159562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 159662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 159762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 159862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 159962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 160062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_STS0 & 0x7F) >> 2); 160162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_GLBL_STS1 & 0x7F) >> 2); 160262306a36Sopenharmony_ci 160362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 160462306a36Sopenharmony_ci 160562306a36Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 160662306a36Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 160762306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CQ_CFG0 & 0x7F) >> 2); 160862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_CFG1 & 0x7F) >> 2); 160962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_ARUSER & 0x7F) >> 2); 161062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 161162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 161262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 161362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 161462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_STS0 & 0x7F) >> 2); 161562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_STS1 & 0x7F) >> 2); 161662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 161762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 161862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 161962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 162062306a36Sopenharmony_ci 162162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 162262306a36Sopenharmony_ci 162362306a36Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 162462306a36Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 162562306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 162662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 162762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 162862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 162962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 163062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 163162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 163262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 163362306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 163462306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 163562306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 163662306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 163762306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 163862306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 163962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 164062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_STS & 0x7F) >> 2); 164162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 164262306a36Sopenharmony_ci 164362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 164462306a36Sopenharmony_ci 164562306a36Sopenharmony_ci pb_addr = (mmTPC4_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 164662306a36Sopenharmony_ci word_offset = ((mmTPC4_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 164762306a36Sopenharmony_ci << 2; 164862306a36Sopenharmony_ci mask = 1 << ((mmTPC4_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 164962306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 165062306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CP_DBG_0 & 0x7F) >> 2); 165162306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 165262306a36Sopenharmony_ci mask |= 1 << ((mmTPC4_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 165362306a36Sopenharmony_ci 165462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 165562306a36Sopenharmony_ci 165662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_RTR_BASE); 165762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_RD_REGULATOR_BASE); 165862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC5_WR_REGULATOR_BASE); 165962306a36Sopenharmony_ci 166062306a36Sopenharmony_ci pb_addr = (mmTPC5_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 166162306a36Sopenharmony_ci word_offset = ((mmTPC5_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 166262306a36Sopenharmony_ci 166362306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_SEMAPHORE & 0x7F) >> 2); 166462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2); 166562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2); 166662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_STATUS & 0x7F) >> 2); 166762306a36Sopenharmony_ci 166862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 166962306a36Sopenharmony_ci 167062306a36Sopenharmony_ci pb_addr = (mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 167162306a36Sopenharmony_ci word_offset = ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 167262306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 167362306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 167462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 167562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 167662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 167762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2); 167862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2); 167962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 168062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_TPC_INTR_MASK & 0x7F) >> 2); 168162306a36Sopenharmony_ci 168262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 168362306a36Sopenharmony_ci 168462306a36Sopenharmony_ci pb_addr = (mmTPC5_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 168562306a36Sopenharmony_ci word_offset = ((mmTPC5_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 168662306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_ARUSER & 0x7F) >> 2); 168762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_AWUSER & 0x7F) >> 2); 168862306a36Sopenharmony_ci 168962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 169062306a36Sopenharmony_ci 169162306a36Sopenharmony_ci pb_addr = (mmTPC5_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 169262306a36Sopenharmony_ci word_offset = ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 169362306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 169462306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 169562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 169662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 169762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 169862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 169962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 170062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 170162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 170262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 170362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 170462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 170562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 170662306a36Sopenharmony_ci 170762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 170862306a36Sopenharmony_ci 170962306a36Sopenharmony_ci pb_addr = (mmTPC5_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 171062306a36Sopenharmony_ci word_offset = ((mmTPC5_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 171162306a36Sopenharmony_ci mask = 1 << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2); 171262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_CFG1 & 0x7F) >> 2); 171362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_PROT & 0x7F) >> 2); 171462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_CFG & 0x7F) >> 2); 171562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 171662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 171762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 171862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 171962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 172062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_STS0 & 0x7F) >> 2); 172162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_GLBL_STS1 & 0x7F) >> 2); 172262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_BASE_LO & 0x7F) >> 2); 172362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_BASE_HI & 0x7F) >> 2); 172462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_SIZE & 0x7F) >> 2); 172562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PI & 0x7F) >> 2); 172662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CI & 0x7F) >> 2); 172762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CFG0 & 0x7F) >> 2); 172862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_CFG1 & 0x7F) >> 2); 172962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_ARUSER & 0x7F) >> 2); 173062306a36Sopenharmony_ci 173162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 173262306a36Sopenharmony_ci 173362306a36Sopenharmony_ci pb_addr = (mmTPC5_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 173462306a36Sopenharmony_ci word_offset = ((mmTPC5_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 173562306a36Sopenharmony_ci mask = 1 << ((mmTPC5_QM_PQ_PUSH0 & 0x7F) >> 2); 173662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH1 & 0x7F) >> 2); 173762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH2 & 0x7F) >> 2); 173862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_PUSH3 & 0x7F) >> 2); 173962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_STS0 & 0x7F) >> 2); 174062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_STS1 & 0x7F) >> 2); 174162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 174262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 174362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 174462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 174562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CFG0 & 0x7F) >> 2); 174662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CFG1 & 0x7F) >> 2); 174762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_ARUSER & 0x7F) >> 2); 174862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_LO & 0x7F) >> 2); 174962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_HI & 0x7F) >> 2); 175062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_TSIZE & 0x7F) >> 2); 175162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CTL & 0x7F) >> 2); 175262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 175362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 175462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_TSIZE_STS & 0x7F) >> 2); 175562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_CTL_STS & 0x7F) >> 2); 175662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_STS0 & 0x7F) >> 2); 175762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_STS1 & 0x7F) >> 2); 175862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 175962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 176062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 176162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 176262306a36Sopenharmony_ci 176362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 176462306a36Sopenharmony_ci 176562306a36Sopenharmony_ci pb_addr = (mmTPC5_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 176662306a36Sopenharmony_ci word_offset = ((mmTPC5_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 176762306a36Sopenharmony_ci mask = 1 << ((mmTPC5_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 176862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 176962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 177062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 177162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 177262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 177362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 177462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 177562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 177662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 177762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 177862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 177962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 178062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 178162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 178262306a36Sopenharmony_ci 178362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 178462306a36Sopenharmony_ci 178562306a36Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 178662306a36Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 178762306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 178862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 178962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_PROT & 0x7F) >> 2); 179062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 179162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 179262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 179362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 179462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 179562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 179662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_STS0 & 0x7F) >> 2); 179762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_GLBL_STS1 & 0x7F) >> 2); 179862306a36Sopenharmony_ci 179962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 180062306a36Sopenharmony_ci 180162306a36Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 180262306a36Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 180362306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CQ_CFG0 & 0x7F) >> 2); 180462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_CFG1 & 0x7F) >> 2); 180562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_ARUSER & 0x7F) >> 2); 180662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 180762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 180862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 180962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 181062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_STS0 & 0x7F) >> 2); 181162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_STS1 & 0x7F) >> 2); 181262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 181362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 181462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 181562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 181662306a36Sopenharmony_ci 181762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 181862306a36Sopenharmony_ci 181962306a36Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 182062306a36Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 182162306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 182262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 182362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 182462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 182562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 182662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 182762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 182862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 182962306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 183062306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 183162306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 183262306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 183362306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 183462306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 183562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 183662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_STS & 0x7F) >> 2); 183762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 183862306a36Sopenharmony_ci 183962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 184062306a36Sopenharmony_ci 184162306a36Sopenharmony_ci pb_addr = (mmTPC5_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 184262306a36Sopenharmony_ci word_offset = ((mmTPC5_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 184362306a36Sopenharmony_ci << 2; 184462306a36Sopenharmony_ci mask = 1 << ((mmTPC5_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 184562306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 184662306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CP_DBG_0 & 0x7F) >> 2); 184762306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 184862306a36Sopenharmony_ci mask |= 1 << ((mmTPC5_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 184962306a36Sopenharmony_ci 185062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 185162306a36Sopenharmony_ci 185262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_RTR_BASE); 185362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_RD_REGULATOR_BASE); 185462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC6_WR_REGULATOR_BASE); 185562306a36Sopenharmony_ci 185662306a36Sopenharmony_ci pb_addr = (mmTPC6_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 185762306a36Sopenharmony_ci word_offset = ((mmTPC6_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 185862306a36Sopenharmony_ci 185962306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_SEMAPHORE & 0x7F) >> 2); 186062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2); 186162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2); 186262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_STATUS & 0x7F) >> 2); 186362306a36Sopenharmony_ci 186462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 186562306a36Sopenharmony_ci 186662306a36Sopenharmony_ci pb_addr = (mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 186762306a36Sopenharmony_ci word_offset = ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 186862306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 186962306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 187062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 187162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 187262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 187362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2); 187462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2); 187562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 187662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_TPC_INTR_MASK & 0x7F) >> 2); 187762306a36Sopenharmony_ci 187862306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 187962306a36Sopenharmony_ci 188062306a36Sopenharmony_ci pb_addr = (mmTPC6_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 188162306a36Sopenharmony_ci word_offset = ((mmTPC6_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 188262306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_ARUSER & 0x7F) >> 2); 188362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_AWUSER & 0x7F) >> 2); 188462306a36Sopenharmony_ci 188562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 188662306a36Sopenharmony_ci 188762306a36Sopenharmony_ci pb_addr = (mmTPC6_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 188862306a36Sopenharmony_ci word_offset = ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 188962306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 189062306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 189162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 189262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 189362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 189462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 189562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 189662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 189762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 189862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 189962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 190062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 190162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 190262306a36Sopenharmony_ci 190362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 190462306a36Sopenharmony_ci 190562306a36Sopenharmony_ci pb_addr = (mmTPC6_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 190662306a36Sopenharmony_ci word_offset = ((mmTPC6_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 190762306a36Sopenharmony_ci mask = 1 << ((mmTPC6_QM_GLBL_CFG0 & 0x7F) >> 2); 190862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_CFG1 & 0x7F) >> 2); 190962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_PROT & 0x7F) >> 2); 191062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_CFG & 0x7F) >> 2); 191162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 191262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 191362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 191462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 191562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 191662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_STS0 & 0x7F) >> 2); 191762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_GLBL_STS1 & 0x7F) >> 2); 191862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_BASE_LO & 0x7F) >> 2); 191962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_BASE_HI & 0x7F) >> 2); 192062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_SIZE & 0x7F) >> 2); 192162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PI & 0x7F) >> 2); 192262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CI & 0x7F) >> 2); 192362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CFG0 & 0x7F) >> 2); 192462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_CFG1 & 0x7F) >> 2); 192562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_ARUSER & 0x7F) >> 2); 192662306a36Sopenharmony_ci 192762306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 192862306a36Sopenharmony_ci 192962306a36Sopenharmony_ci pb_addr = (mmTPC6_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 193062306a36Sopenharmony_ci word_offset = ((mmTPC6_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 193162306a36Sopenharmony_ci mask = 1 << ((mmTPC6_QM_PQ_PUSH0 & 0x7F) >> 2); 193262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH1 & 0x7F) >> 2); 193362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH2 & 0x7F) >> 2); 193462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_PUSH3 & 0x7F) >> 2); 193562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_STS0 & 0x7F) >> 2); 193662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_STS1 & 0x7F) >> 2); 193762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 193862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 193962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 194062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 194162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CFG0 & 0x7F) >> 2); 194262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CFG1 & 0x7F) >> 2); 194362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_ARUSER & 0x7F) >> 2); 194462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_LO & 0x7F) >> 2); 194562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_HI & 0x7F) >> 2); 194662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_TSIZE & 0x7F) >> 2); 194762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CTL & 0x7F) >> 2); 194862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 194962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 195062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_TSIZE_STS & 0x7F) >> 2); 195162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_CTL_STS & 0x7F) >> 2); 195262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_STS0 & 0x7F) >> 2); 195362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_STS1 & 0x7F) >> 2); 195462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 195562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 195662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 195762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 195862306a36Sopenharmony_ci 195962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 196062306a36Sopenharmony_ci 196162306a36Sopenharmony_ci pb_addr = (mmTPC6_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 196262306a36Sopenharmony_ci word_offset = ((mmTPC6_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 196362306a36Sopenharmony_ci mask = 1 << ((mmTPC6_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 196462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 196562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 196662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 196762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 196862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 196962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 197062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 197162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 197262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 197362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 197462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 197562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 197662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 197762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 197862306a36Sopenharmony_ci 197962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 198062306a36Sopenharmony_ci 198162306a36Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 198262306a36Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 198362306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 198462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 198562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_PROT & 0x7F) >> 2); 198662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 198762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 198862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 198962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 199062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 199162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 199262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_STS0 & 0x7F) >> 2); 199362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_GLBL_STS1 & 0x7F) >> 2); 199462306a36Sopenharmony_ci 199562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 199662306a36Sopenharmony_ci 199762306a36Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 199862306a36Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 199962306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CQ_CFG0 & 0x7F) >> 2); 200062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_CFG1 & 0x7F) >> 2); 200162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_ARUSER & 0x7F) >> 2); 200262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 200362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 200462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 200562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 200662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_STS0 & 0x7F) >> 2); 200762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_STS1 & 0x7F) >> 2); 200862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 200962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 201062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 201162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 201262306a36Sopenharmony_ci 201362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 201462306a36Sopenharmony_ci 201562306a36Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 201662306a36Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 201762306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 201862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 201962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 202062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 202162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 202262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 202362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 202462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 202562306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 202662306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 202762306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 202862306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 202962306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 203062306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 203162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 203262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_STS & 0x7F) >> 2); 203362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 203462306a36Sopenharmony_ci 203562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 203662306a36Sopenharmony_ci 203762306a36Sopenharmony_ci pb_addr = (mmTPC6_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 203862306a36Sopenharmony_ci word_offset = ((mmTPC6_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 203962306a36Sopenharmony_ci << 2; 204062306a36Sopenharmony_ci mask = 1 << ((mmTPC6_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 204162306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 204262306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CP_DBG_0 & 0x7F) >> 2); 204362306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 204462306a36Sopenharmony_ci mask |= 1 << ((mmTPC6_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 204562306a36Sopenharmony_ci 204662306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 204762306a36Sopenharmony_ci 204862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_NRTR_BASE); 204962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_RD_REGULATOR_BASE); 205062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC7_WR_REGULATOR_BASE); 205162306a36Sopenharmony_ci 205262306a36Sopenharmony_ci pb_addr = (mmTPC7_CFG_SEMAPHORE & ~0xFFF) + PROT_BITS_OFFS; 205362306a36Sopenharmony_ci word_offset = ((mmTPC7_CFG_SEMAPHORE & PROT_BITS_OFFS) >> 7) << 2; 205462306a36Sopenharmony_ci 205562306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_SEMAPHORE & 0x7F) >> 2); 205662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2); 205762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2); 205862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_STATUS & 0x7F) >> 2); 205962306a36Sopenharmony_ci 206062306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 206162306a36Sopenharmony_ci 206262306a36Sopenharmony_ci pb_addr = (mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & ~0xFFF) + PROT_BITS_OFFS; 206362306a36Sopenharmony_ci word_offset = ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 206462306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 206562306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); 206662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); 206762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); 206862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); 206962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2); 207062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2); 207162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); 207262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_TPC_INTR_MASK & 0x7F) >> 2); 207362306a36Sopenharmony_ci 207462306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 207562306a36Sopenharmony_ci 207662306a36Sopenharmony_ci pb_addr = (mmTPC7_CFG_ARUSER & ~0xFFF) + PROT_BITS_OFFS; 207762306a36Sopenharmony_ci word_offset = ((mmTPC7_CFG_ARUSER & PROT_BITS_OFFS) >> 7) << 2; 207862306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_ARUSER & 0x7F) >> 2); 207962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_AWUSER & 0x7F) >> 2); 208062306a36Sopenharmony_ci 208162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 208262306a36Sopenharmony_ci 208362306a36Sopenharmony_ci pb_addr = (mmTPC7_CFG_FUNC_MBIST_CNTRL & ~0xFFF) + PROT_BITS_OFFS; 208462306a36Sopenharmony_ci word_offset = ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 208562306a36Sopenharmony_ci PROT_BITS_OFFS) >> 7) << 2; 208662306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); 208762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); 208862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); 208962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); 209062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); 209162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); 209262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); 209362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); 209462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); 209562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); 209662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); 209762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); 209862306a36Sopenharmony_ci 209962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 210062306a36Sopenharmony_ci 210162306a36Sopenharmony_ci pb_addr = (mmTPC7_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 210262306a36Sopenharmony_ci word_offset = ((mmTPC7_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 210362306a36Sopenharmony_ci mask = 1 << ((mmTPC7_QM_GLBL_CFG0 & 0x7F) >> 2); 210462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_CFG1 & 0x7F) >> 2); 210562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_PROT & 0x7F) >> 2); 210662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_CFG & 0x7F) >> 2); 210762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 210862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 210962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_ERR_WDATA & 0x7F) >> 2); 211062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_SECURE_PROPS & 0x7F) >> 2); 211162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 211262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_STS0 & 0x7F) >> 2); 211362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_GLBL_STS1 & 0x7F) >> 2); 211462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_BASE_LO & 0x7F) >> 2); 211562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_BASE_HI & 0x7F) >> 2); 211662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_SIZE & 0x7F) >> 2); 211762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PI & 0x7F) >> 2); 211862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CI & 0x7F) >> 2); 211962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CFG0 & 0x7F) >> 2); 212062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_CFG1 & 0x7F) >> 2); 212162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_ARUSER & 0x7F) >> 2); 212262306a36Sopenharmony_ci 212362306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 212462306a36Sopenharmony_ci 212562306a36Sopenharmony_ci pb_addr = (mmTPC7_QM_PQ_PUSH0 & ~0xFFF) + PROT_BITS_OFFS; 212662306a36Sopenharmony_ci word_offset = ((mmTPC7_QM_PQ_PUSH0 & PROT_BITS_OFFS) >> 7) << 2; 212762306a36Sopenharmony_ci mask = 1 << ((mmTPC7_QM_PQ_PUSH0 & 0x7F) >> 2); 212862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH1 & 0x7F) >> 2); 212962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH2 & 0x7F) >> 2); 213062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_PUSH3 & 0x7F) >> 2); 213162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_STS0 & 0x7F) >> 2); 213262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_STS1 & 0x7F) >> 2); 213362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_EN & 0x7F) >> 2); 213462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 213562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 213662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_PQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 213762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CFG0 & 0x7F) >> 2); 213862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CFG1 & 0x7F) >> 2); 213962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_ARUSER & 0x7F) >> 2); 214062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_LO & 0x7F) >> 2); 214162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_HI & 0x7F) >> 2); 214262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_TSIZE & 0x7F) >> 2); 214362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CTL & 0x7F) >> 2); 214462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_LO_STS & 0x7F) >> 2); 214562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_PTR_HI_STS & 0x7F) >> 2); 214662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_TSIZE_STS & 0x7F) >> 2); 214762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_CTL_STS & 0x7F) >> 2); 214862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_STS0 & 0x7F) >> 2); 214962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_STS1 & 0x7F) >> 2); 215062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 215162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 215262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 215362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 215462306a36Sopenharmony_ci 215562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 215662306a36Sopenharmony_ci 215762306a36Sopenharmony_ci pb_addr = (mmTPC7_QM_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 215862306a36Sopenharmony_ci word_offset = ((mmTPC7_QM_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 215962306a36Sopenharmony_ci mask = 1 << ((mmTPC7_QM_CQ_IFIFO_CNT & 0x7F) >> 2); 216062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 216162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 216262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 216362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 216462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 216562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 216662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 216762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 216862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 216962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 217062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 217162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 217262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 217362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_QM_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 217462306a36Sopenharmony_ci 217562306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 217662306a36Sopenharmony_ci 217762306a36Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 217862306a36Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 217962306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_GLBL_CFG0 & 0x7F) >> 2); 218062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_CFG1 & 0x7F) >> 2); 218162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_PROT & 0x7F) >> 2); 218262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_CFG & 0x7F) >> 2); 218362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_ADDR_LO & 0x7F) >> 2); 218462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_ADDR_HI & 0x7F) >> 2); 218562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_ERR_WDATA & 0x7F) >> 2); 218662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_SECURE_PROPS & 0x7F) >> 2); 218762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_NON_SECURE_PROPS & 0x7F) >> 2); 218862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_STS0 & 0x7F) >> 2); 218962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_GLBL_STS1 & 0x7F) >> 2); 219062306a36Sopenharmony_ci 219162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 219262306a36Sopenharmony_ci 219362306a36Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CQ_CFG0 & ~0xFFF) + PROT_BITS_OFFS; 219462306a36Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CQ_CFG0 & PROT_BITS_OFFS) >> 7) << 2; 219562306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CQ_CFG0 & 0x7F) >> 2); 219662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_CFG1 & 0x7F) >> 2); 219762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_ARUSER & 0x7F) >> 2); 219862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_PTR_LO_STS & 0x7F) >> 2); 219962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_PTR_HI_STS & 0x7F) >> 2); 220062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_TSIZE_STS & 0x7F) >> 2); 220162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_CTL_STS & 0x7F) >> 2); 220262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_STS0 & 0x7F) >> 2); 220362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_STS1 & 0x7F) >> 2); 220462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_EN & 0x7F) >> 2); 220562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN & 0x7F) >> 2); 220662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); 220762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_RD_RATE_LIM_TOUT & 0x7F) >> 2); 220862306a36Sopenharmony_ci 220962306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 221062306a36Sopenharmony_ci 221162306a36Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CQ_IFIFO_CNT & ~0xFFF) + PROT_BITS_OFFS; 221262306a36Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CQ_IFIFO_CNT & PROT_BITS_OFFS) >> 7) << 2; 221362306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CQ_IFIFO_CNT & 0x7F) >> 2); 221462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE0_ADDR_LO & 0x7F) >> 2); 221562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE0_ADDR_HI & 0x7F) >> 2); 221662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE1_ADDR_LO & 0x7F) >> 2); 221762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE1_ADDR_HI & 0x7F) >> 2); 221862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE2_ADDR_LO & 0x7F) >> 2); 221962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE2_ADDR_HI & 0x7F) >> 2); 222062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE3_ADDR_LO & 0x7F) >> 2); 222162306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_MSG_BASE3_ADDR_HI & 0x7F) >> 2); 222262306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_TSIZE_OFFSET & 0x7F) >> 2); 222362306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET & 0x7F) >> 2); 222462306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET & 0x7F) >> 2); 222562306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET & 0x7F) >> 2); 222662306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET & 0x7F) >> 2); 222762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_LDMA_COMMIT_OFFSET & 0x7F) >> 2); 222862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_STS & 0x7F) >> 2); 222962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_CURRENT_INST_LO & 0x7F) >> 2); 223062306a36Sopenharmony_ci 223162306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 223262306a36Sopenharmony_ci 223362306a36Sopenharmony_ci pb_addr = (mmTPC7_CMDQ_CP_CURRENT_INST_HI & ~0xFFF) + PROT_BITS_OFFS; 223462306a36Sopenharmony_ci word_offset = ((mmTPC7_CMDQ_CP_CURRENT_INST_HI & PROT_BITS_OFFS) >> 7) 223562306a36Sopenharmony_ci << 2; 223662306a36Sopenharmony_ci mask = 1 << ((mmTPC7_CMDQ_CP_CURRENT_INST_HI & 0x7F) >> 2); 223762306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_BARRIER_CFG & 0x7F) >> 2); 223862306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CP_DBG_0 & 0x7F) >> 2); 223962306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_BUF_ADDR & 0x7F) >> 2); 224062306a36Sopenharmony_ci mask |= 1 << ((mmTPC7_CMDQ_CQ_BUF_RDATA & 0x7F) >> 2); 224162306a36Sopenharmony_ci 224262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, ~mask); 224362306a36Sopenharmony_ci} 224462306a36Sopenharmony_ci 224562306a36Sopenharmony_ci/* 224662306a36Sopenharmony_ci * goya_init_protection_bits - Initialize protection bits for specific registers 224762306a36Sopenharmony_ci * 224862306a36Sopenharmony_ci * @hdev: pointer to hl_device structure 224962306a36Sopenharmony_ci * 225062306a36Sopenharmony_ci * All protection bits are 1 by default, means not protected. Need to set to 0 225162306a36Sopenharmony_ci * each bit that belongs to a protected register. 225262306a36Sopenharmony_ci * 225362306a36Sopenharmony_ci */ 225462306a36Sopenharmony_cistatic void goya_init_protection_bits(struct hl_device *hdev) 225562306a36Sopenharmony_ci{ 225662306a36Sopenharmony_ci /* 225762306a36Sopenharmony_ci * In each 4K block of registers, the last 128 bytes are protection 225862306a36Sopenharmony_ci * bits - total of 1024 bits, one for each register. Each bit is related 225962306a36Sopenharmony_ci * to a specific register, by the order of the registers. 226062306a36Sopenharmony_ci * So in order to calculate the bit that is related to a given register, 226162306a36Sopenharmony_ci * we need to calculate its word offset and then the exact bit inside 226262306a36Sopenharmony_ci * the word (which is 4 bytes). 226362306a36Sopenharmony_ci * 226462306a36Sopenharmony_ci * Register address: 226562306a36Sopenharmony_ci * 226662306a36Sopenharmony_ci * 31 12 11 7 6 2 1 0 226762306a36Sopenharmony_ci * ----------------------------------------------------------------- 226862306a36Sopenharmony_ci * | Don't | word | bit location | 0 | 226962306a36Sopenharmony_ci * | care | offset | inside word | | 227062306a36Sopenharmony_ci * ----------------------------------------------------------------- 227162306a36Sopenharmony_ci * 227262306a36Sopenharmony_ci * Bits 7-11 represents the word offset inside the 128 bytes. 227362306a36Sopenharmony_ci * Bits 2-6 represents the bit location inside the word. 227462306a36Sopenharmony_ci */ 227562306a36Sopenharmony_ci u32 pb_addr, mask; 227662306a36Sopenharmony_ci u8 word_offset; 227762306a36Sopenharmony_ci 227862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_NRTR_BASE); 227962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_RD_REGULATOR_BASE); 228062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCI_WR_REGULATOR_BASE); 228162306a36Sopenharmony_ci 228262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X0_BANK_BASE); 228362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X0_RTR_BASE); 228462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X1_BANK_BASE); 228562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X1_RTR_BASE); 228662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X2_BANK_BASE); 228762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X2_RTR_BASE); 228862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X3_BANK_BASE); 228962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X3_RTR_BASE); 229062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X4_BANK_BASE); 229162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y0_X4_RTR_BASE); 229262306a36Sopenharmony_ci 229362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X0_BANK_BASE); 229462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X0_RTR_BASE); 229562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X1_BANK_BASE); 229662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X1_RTR_BASE); 229762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X2_BANK_BASE); 229862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X2_RTR_BASE); 229962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X3_BANK_BASE); 230062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X3_RTR_BASE); 230162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X4_BANK_BASE); 230262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y1_X4_RTR_BASE); 230362306a36Sopenharmony_ci 230462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X0_BANK_BASE); 230562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X0_RTR_BASE); 230662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X1_BANK_BASE); 230762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X1_RTR_BASE); 230862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X2_BANK_BASE); 230962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X2_RTR_BASE); 231062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X3_BANK_BASE); 231162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X3_RTR_BASE); 231262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X4_BANK_BASE); 231362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y2_X4_RTR_BASE); 231462306a36Sopenharmony_ci 231562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X0_BANK_BASE); 231662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X0_RTR_BASE); 231762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X1_BANK_BASE); 231862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X1_RTR_BASE); 231962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X2_BANK_BASE); 232062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X2_RTR_BASE); 232162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X3_BANK_BASE); 232262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X3_RTR_BASE); 232362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X4_BANK_BASE); 232462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y3_X4_RTR_BASE); 232562306a36Sopenharmony_ci 232662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X0_BANK_BASE); 232762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X0_RTR_BASE); 232862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X1_BANK_BASE); 232962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X1_RTR_BASE); 233062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X2_BANK_BASE); 233162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X2_RTR_BASE); 233262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X3_BANK_BASE); 233362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X3_RTR_BASE); 233462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X4_BANK_BASE); 233562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y4_X4_RTR_BASE); 233662306a36Sopenharmony_ci 233762306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X0_BANK_BASE); 233862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X0_RTR_BASE); 233962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X1_BANK_BASE); 234062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X1_RTR_BASE); 234162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X2_BANK_BASE); 234262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X2_RTR_BASE); 234362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X3_BANK_BASE); 234462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X3_RTR_BASE); 234562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X4_BANK_BASE); 234662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmSRAM_Y5_X4_RTR_BASE); 234762306a36Sopenharmony_ci 234862306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_WRAP_BASE); 234962306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_CORE_BASE); 235062306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_CFG_BASE); 235162306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_CMD_BASE); 235262306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_AUX_BASE); 235362306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_DB_RSV_BASE); 235462306a36Sopenharmony_ci goya_pb_set_block(hdev, mmPCIE_PHY_BASE); 235562306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC0_NRTR_BASE); 235662306a36Sopenharmony_ci goya_pb_set_block(hdev, mmTPC_PLL_BASE); 235762306a36Sopenharmony_ci 235862306a36Sopenharmony_ci pb_addr = (mmTPC_PLL_CLK_RLX_0 & ~0xFFF) + PROT_BITS_OFFS; 235962306a36Sopenharmony_ci word_offset = ((mmTPC_PLL_CLK_RLX_0 & PROT_BITS_OFFS) >> 7) << 2; 236062306a36Sopenharmony_ci mask = 1 << ((mmTPC_PLL_CLK_RLX_0 & 0x7C) >> 2); 236162306a36Sopenharmony_ci 236262306a36Sopenharmony_ci WREG32(pb_addr + word_offset, mask); 236362306a36Sopenharmony_ci 236462306a36Sopenharmony_ci goya_init_mme_protection_bits(hdev); 236562306a36Sopenharmony_ci 236662306a36Sopenharmony_ci goya_init_dma_protection_bits(hdev); 236762306a36Sopenharmony_ci 236862306a36Sopenharmony_ci goya_init_tpc_protection_bits(hdev); 236962306a36Sopenharmony_ci} 237062306a36Sopenharmony_ci 237162306a36Sopenharmony_ci/* 237262306a36Sopenharmony_ci * goya_init_security - Initialize security model 237362306a36Sopenharmony_ci * 237462306a36Sopenharmony_ci * @hdev: pointer to hl_device structure 237562306a36Sopenharmony_ci * 237662306a36Sopenharmony_ci * Initialize the security model of the device 237762306a36Sopenharmony_ci * That includes range registers and protection bit per register 237862306a36Sopenharmony_ci * 237962306a36Sopenharmony_ci */ 238062306a36Sopenharmony_civoid goya_init_security(struct hl_device *hdev) 238162306a36Sopenharmony_ci{ 238262306a36Sopenharmony_ci struct goya_device *goya = hdev->asic_specific; 238362306a36Sopenharmony_ci 238462306a36Sopenharmony_ci u32 dram_addr_lo = lower_32_bits(DRAM_PHYS_BASE); 238562306a36Sopenharmony_ci u32 dram_addr_hi = upper_32_bits(DRAM_PHYS_BASE); 238662306a36Sopenharmony_ci 238762306a36Sopenharmony_ci u32 lbw_rng0_base = 0xFC440000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 238862306a36Sopenharmony_ci u32 lbw_rng0_mask = 0xFFFF0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 238962306a36Sopenharmony_ci 239062306a36Sopenharmony_ci u32 lbw_rng1_base = 0xFC480000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239162306a36Sopenharmony_ci u32 lbw_rng1_mask = 0xFFF80000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239262306a36Sopenharmony_ci 239362306a36Sopenharmony_ci u32 lbw_rng2_base = 0xFC600000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239462306a36Sopenharmony_ci u32 lbw_rng2_mask = 0xFFE00000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239562306a36Sopenharmony_ci 239662306a36Sopenharmony_ci u32 lbw_rng3_base = 0xFC800000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239762306a36Sopenharmony_ci u32 lbw_rng3_mask = 0xFFF00000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 239862306a36Sopenharmony_ci 239962306a36Sopenharmony_ci u32 lbw_rng4_base = 0xFCC02000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240062306a36Sopenharmony_ci u32 lbw_rng4_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240162306a36Sopenharmony_ci 240262306a36Sopenharmony_ci u32 lbw_rng5_base = 0xFCC40000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240362306a36Sopenharmony_ci u32 lbw_rng5_mask = 0xFFFF8000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240462306a36Sopenharmony_ci 240562306a36Sopenharmony_ci u32 lbw_rng6_base = 0xFCC48000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240662306a36Sopenharmony_ci u32 lbw_rng6_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240762306a36Sopenharmony_ci 240862306a36Sopenharmony_ci u32 lbw_rng7_base = 0xFCC4A000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 240962306a36Sopenharmony_ci u32 lbw_rng7_mask = 0xFFFFE000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241062306a36Sopenharmony_ci 241162306a36Sopenharmony_ci u32 lbw_rng8_base = 0xFCC4C000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241262306a36Sopenharmony_ci u32 lbw_rng8_mask = 0xFFFFC000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241362306a36Sopenharmony_ci 241462306a36Sopenharmony_ci u32 lbw_rng9_base = 0xFCC50000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241562306a36Sopenharmony_ci u32 lbw_rng9_mask = 0xFFFF0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241662306a36Sopenharmony_ci 241762306a36Sopenharmony_ci u32 lbw_rng10_base = 0xFCC60000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241862306a36Sopenharmony_ci u32 lbw_rng10_mask = 0xFFFE0000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 241962306a36Sopenharmony_ci 242062306a36Sopenharmony_ci u32 lbw_rng11_base = 0xFCE02000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242162306a36Sopenharmony_ci u32 lbw_rng11_mask = 0xFFFFE000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242262306a36Sopenharmony_ci 242362306a36Sopenharmony_ci u32 lbw_rng12_base = 0xFE484000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242462306a36Sopenharmony_ci u32 lbw_rng12_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242562306a36Sopenharmony_ci 242662306a36Sopenharmony_ci u32 lbw_rng13_base = 0xFEC43000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242762306a36Sopenharmony_ci u32 lbw_rng13_mask = 0xFFFFF000 & DMA_MACRO_LBW_RANGE_BASE_R_MASK; 242862306a36Sopenharmony_ci 242962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_HIT_BLOCK, 0xFFFF); 243062306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFF); 243162306a36Sopenharmony_ci 243262306a36Sopenharmony_ci if (!(goya->hw_cap_initialized & HW_CAP_MMU)) { 243362306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFE); 243462306a36Sopenharmony_ci 243562306a36Sopenharmony_ci /* Protect HOST */ 243662306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_0, 0); 243762306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_0, 0); 243862306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_0, 0); 243962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_0, 0xFFF80); 244062306a36Sopenharmony_ci } 244162306a36Sopenharmony_ci 244262306a36Sopenharmony_ci /* 244362306a36Sopenharmony_ci * Protect DDR @ 244462306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 244562306a36Sopenharmony_ci * The mask protects the first 512MB 244662306a36Sopenharmony_ci */ 244762306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_1, dram_addr_lo); 244862306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_1, dram_addr_hi); 244962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_1, 0xE0000000); 245062306a36Sopenharmony_ci WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_1, 0x3FFFF); 245162306a36Sopenharmony_ci 245262306a36Sopenharmony_ci /* Protect registers */ 245362306a36Sopenharmony_ci 245462306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_0, lbw_rng0_base); 245562306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_0, lbw_rng0_mask); 245662306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_1, lbw_rng1_base); 245762306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_1, lbw_rng1_mask); 245862306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_2, lbw_rng2_base); 245962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_2, lbw_rng2_mask); 246062306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_3, lbw_rng3_base); 246162306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_3, lbw_rng3_mask); 246262306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_4, lbw_rng4_base); 246362306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_4, lbw_rng4_mask); 246462306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_5, lbw_rng5_base); 246562306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_5, lbw_rng5_mask); 246662306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_6, lbw_rng6_base); 246762306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_6, lbw_rng6_mask); 246862306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_7, lbw_rng7_base); 246962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_7, lbw_rng7_mask); 247062306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_8, lbw_rng8_base); 247162306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_8, lbw_rng8_mask); 247262306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_9, lbw_rng9_base); 247362306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_9, lbw_rng9_mask); 247462306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_10, lbw_rng10_base); 247562306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_10, lbw_rng10_mask); 247662306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_11, lbw_rng11_base); 247762306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_11, lbw_rng11_mask); 247862306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_12, lbw_rng12_base); 247962306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_12, lbw_rng12_mask); 248062306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_BASE_13, lbw_rng13_base); 248162306a36Sopenharmony_ci WREG32(mmDMA_MACRO_LBW_RANGE_MASK_13, lbw_rng13_mask); 248262306a36Sopenharmony_ci 248362306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_HIT, 0xFFFF); 248462306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_HIT, 0xFFFF); 248562306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_HIT, 0xFFFF); 248662306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_HIT, 0xFFFF); 248762306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_HIT, 0xFFFF); 248862306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_HIT, 0xFFFF); 248962306a36Sopenharmony_ci 249062306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_HIT, 0xFE); 249162306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_HIT, 0xFE); 249262306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_HIT, 0xFE); 249362306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_HIT, 0xFE); 249462306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_HIT, 0xFE); 249562306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_HIT, 0xFE); 249662306a36Sopenharmony_ci 249762306a36Sopenharmony_ci /* Protect HOST */ 249862306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_0, 0); 249962306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_0, 0); 250062306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_0, 0); 250162306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 250262306a36Sopenharmony_ci 250362306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_0, 0); 250462306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_0, 0); 250562306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_0, 0); 250662306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 250762306a36Sopenharmony_ci 250862306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_0, 0); 250962306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_0, 0); 251062306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_0, 0); 251162306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 251262306a36Sopenharmony_ci 251362306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_0, 0); 251462306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_0, 0); 251562306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_0, 0); 251662306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 251762306a36Sopenharmony_ci 251862306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_0, 0); 251962306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_0, 0); 252062306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_0, 0); 252162306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 252262306a36Sopenharmony_ci 252362306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_0, 0); 252462306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_0, 0); 252562306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_0, 0); 252662306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 252762306a36Sopenharmony_ci 252862306a36Sopenharmony_ci /* 252962306a36Sopenharmony_ci * Protect DDR @ 253062306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 253162306a36Sopenharmony_ci * The mask protects the first 512MB 253262306a36Sopenharmony_ci */ 253362306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 253462306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 253562306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 253662306a36Sopenharmony_ci WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 253762306a36Sopenharmony_ci 253862306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 253962306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 254062306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 254162306a36Sopenharmony_ci WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 254262306a36Sopenharmony_ci 254362306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 254462306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 254562306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 254662306a36Sopenharmony_ci WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 254762306a36Sopenharmony_ci 254862306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 254962306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 255062306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 255162306a36Sopenharmony_ci WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 255262306a36Sopenharmony_ci 255362306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 255462306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 255562306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 255662306a36Sopenharmony_ci WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 255762306a36Sopenharmony_ci 255862306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 255962306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 256062306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 256162306a36Sopenharmony_ci WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 256262306a36Sopenharmony_ci 256362306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 256462306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 256562306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 256662306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 256762306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 256862306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 256962306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 257062306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 257162306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 257262306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 257362306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 257462306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 257562306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 257662306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 257762306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 257862306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 257962306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 258062306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 258162306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 258262306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 258362306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 258462306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 258562306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 258662306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 258762306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 258862306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 258962306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 259062306a36Sopenharmony_ci WREG32(mmMME1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 259162306a36Sopenharmony_ci 259262306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 259362306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 259462306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 259562306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 259662306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 259762306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 259862306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 259962306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 260062306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 260162306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 260262306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 260362306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 260462306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 260562306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 260662306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 260762306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 260862306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 260962306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 261062306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 261162306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 261262306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 261362306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 261462306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 261562306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 261662306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 261762306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 261862306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 261962306a36Sopenharmony_ci WREG32(mmMME2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 262062306a36Sopenharmony_ci 262162306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 262262306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 262362306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 262462306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 262562306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 262662306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 262762306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 262862306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 262962306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 263062306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 263162306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 263262306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 263362306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 263462306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 263562306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 263662306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 263762306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 263862306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 263962306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 264062306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 264162306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 264262306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 264362306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 264462306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 264562306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 264662306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 264762306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 264862306a36Sopenharmony_ci WREG32(mmMME3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 264962306a36Sopenharmony_ci 265062306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 265162306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 265262306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 265362306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 265462306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 265562306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 265662306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 265762306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 265862306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 265962306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 266062306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 266162306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 266262306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 266362306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 266462306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 266562306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 266662306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 266762306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 266862306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 266962306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 267062306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 267162306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 267262306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 267362306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 267462306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 267562306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 267662306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 267762306a36Sopenharmony_ci WREG32(mmMME4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 267862306a36Sopenharmony_ci 267962306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 268062306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 268162306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 268262306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 268362306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 268462306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 268562306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 268662306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 268762306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 268862306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 268962306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 269062306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 269162306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 269262306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 269362306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 269462306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 269562306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 269662306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 269762306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 269862306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 269962306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 270062306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 270162306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 270262306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 270362306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 270462306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 270562306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 270662306a36Sopenharmony_ci WREG32(mmMME5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 270762306a36Sopenharmony_ci 270862306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 270962306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 271062306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 271162306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 271262306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 271362306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 271462306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 271562306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 271662306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 271762306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 271862306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 271962306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 272062306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 272162306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 272262306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 272362306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 272462306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 272562306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 272662306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 272762306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 272862306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 272962306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 273062306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 273162306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 273262306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 273362306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 273462306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 273562306a36Sopenharmony_ci WREG32(mmMME6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 273662306a36Sopenharmony_ci 273762306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_HIT, 0xFFFF); 273862306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_HIT, 0xFE); 273962306a36Sopenharmony_ci 274062306a36Sopenharmony_ci /* Protect HOST */ 274162306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_0, 0); 274262306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_0, 0); 274362306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_0, 0); 274462306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80); 274562306a36Sopenharmony_ci 274662306a36Sopenharmony_ci /* 274762306a36Sopenharmony_ci * Protect DDR @ 274862306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 274962306a36Sopenharmony_ci * The mask protects the first 512MB 275062306a36Sopenharmony_ci */ 275162306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 275262306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 275362306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000); 275462306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 275562306a36Sopenharmony_ci 275662306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base); 275762306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 275862306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base); 275962306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 276062306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base); 276162306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 276262306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base); 276362306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 276462306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base); 276562306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 276662306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base); 276762306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 276862306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base); 276962306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 277062306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base); 277162306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 277262306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base); 277362306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 277462306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base); 277562306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 277662306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base); 277762306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 277862306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base); 277962306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 278062306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base); 278162306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 278262306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base); 278362306a36Sopenharmony_ci WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 278462306a36Sopenharmony_ci 278562306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_HIT, 0xFFFF); 278662306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_HIT, 0xFE); 278762306a36Sopenharmony_ci 278862306a36Sopenharmony_ci /* Protect HOST */ 278962306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_0, 0); 279062306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_0, 0); 279162306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_0, 0); 279262306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 279362306a36Sopenharmony_ci 279462306a36Sopenharmony_ci /* 279562306a36Sopenharmony_ci * Protect DDR @ 279662306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 279762306a36Sopenharmony_ci * The mask protects the first 512MB 279862306a36Sopenharmony_ci */ 279962306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 280062306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 280162306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 280262306a36Sopenharmony_ci WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 280362306a36Sopenharmony_ci 280462306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 280562306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 280662306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 280762306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 280862306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 280962306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 281062306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 281162306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 281262306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 281362306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 281462306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 281562306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 281662306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 281762306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 281862306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 281962306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 282062306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 282162306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 282262306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 282362306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 282462306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 282562306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 282662306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 282762306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 282862306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 282962306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 283062306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 283162306a36Sopenharmony_ci WREG32(mmTPC1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 283262306a36Sopenharmony_ci 283362306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_HIT, 0xFFFF); 283462306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_HIT, 0xFE); 283562306a36Sopenharmony_ci 283662306a36Sopenharmony_ci /* Protect HOST */ 283762306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_0, 0); 283862306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_0, 0); 283962306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_0, 0); 284062306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 284162306a36Sopenharmony_ci 284262306a36Sopenharmony_ci /* 284362306a36Sopenharmony_ci * Protect DDR @ 284462306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 284562306a36Sopenharmony_ci * The mask protects the first 512MB 284662306a36Sopenharmony_ci */ 284762306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 284862306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 284962306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 285062306a36Sopenharmony_ci WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 285162306a36Sopenharmony_ci 285262306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 285362306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 285462306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 285562306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 285662306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 285762306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 285862306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 285962306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 286062306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 286162306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 286262306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 286362306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 286462306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 286562306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 286662306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 286762306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 286862306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 286962306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 287062306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 287162306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 287262306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 287362306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 287462306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 287562306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 287662306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 287762306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 287862306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 287962306a36Sopenharmony_ci WREG32(mmTPC2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 288062306a36Sopenharmony_ci 288162306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_HIT, 0xFFFF); 288262306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_HIT, 0xFE); 288362306a36Sopenharmony_ci 288462306a36Sopenharmony_ci /* Protect HOST */ 288562306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_0, 0); 288662306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_0, 0); 288762306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_0, 0); 288862306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 288962306a36Sopenharmony_ci 289062306a36Sopenharmony_ci /* 289162306a36Sopenharmony_ci * Protect DDR @ 289262306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 289362306a36Sopenharmony_ci * The mask protects the first 512MB 289462306a36Sopenharmony_ci */ 289562306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 289662306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 289762306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 289862306a36Sopenharmony_ci WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 289962306a36Sopenharmony_ci 290062306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 290162306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 290262306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 290362306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 290462306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 290562306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 290662306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 290762306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 290862306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 290962306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 291062306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 291162306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 291262306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 291362306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 291462306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 291562306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 291662306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 291762306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 291862306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 291962306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 292062306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 292162306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 292262306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 292362306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 292462306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 292562306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 292662306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 292762306a36Sopenharmony_ci WREG32(mmTPC3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 292862306a36Sopenharmony_ci 292962306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_HIT, 0xFFFF); 293062306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_HIT, 0xFE); 293162306a36Sopenharmony_ci 293262306a36Sopenharmony_ci /* Protect HOST */ 293362306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_0, 0); 293462306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_0, 0); 293562306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_0, 0); 293662306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 293762306a36Sopenharmony_ci 293862306a36Sopenharmony_ci /* 293962306a36Sopenharmony_ci * Protect DDR @ 294062306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 294162306a36Sopenharmony_ci * The mask protects the first 512MB 294262306a36Sopenharmony_ci */ 294362306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 294462306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 294562306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 294662306a36Sopenharmony_ci WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 294762306a36Sopenharmony_ci 294862306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 294962306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 295062306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 295162306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 295262306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 295362306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 295462306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 295562306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 295662306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 295762306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 295862306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 295962306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 296062306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 296162306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 296262306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 296362306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 296462306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 296562306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 296662306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 296762306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 296862306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 296962306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 297062306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 297162306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 297262306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 297362306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 297462306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 297562306a36Sopenharmony_ci WREG32(mmTPC4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 297662306a36Sopenharmony_ci 297762306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_HIT, 0xFFFF); 297862306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_HIT, 0xFE); 297962306a36Sopenharmony_ci 298062306a36Sopenharmony_ci /* Protect HOST */ 298162306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_0, 0); 298262306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_0, 0); 298362306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_0, 0); 298462306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 298562306a36Sopenharmony_ci 298662306a36Sopenharmony_ci /* 298762306a36Sopenharmony_ci * Protect DDR @ 298862306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 298962306a36Sopenharmony_ci * The mask protects the first 512MB 299062306a36Sopenharmony_ci */ 299162306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 299262306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 299362306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 299462306a36Sopenharmony_ci WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 299562306a36Sopenharmony_ci 299662306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 299762306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 299862306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 299962306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 300062306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 300162306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 300262306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 300362306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 300462306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 300562306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 300662306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 300762306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 300862306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 300962306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 301062306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 301162306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 301262306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 301362306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 301462306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 301562306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 301662306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 301762306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 301862306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 301962306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 302062306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 302162306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 302262306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 302362306a36Sopenharmony_ci WREG32(mmTPC5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 302462306a36Sopenharmony_ci 302562306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_HIT, 0xFFFF); 302662306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_HIT, 0xFE); 302762306a36Sopenharmony_ci 302862306a36Sopenharmony_ci /* Protect HOST */ 302962306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_0, 0); 303062306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_0, 0); 303162306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_0, 0); 303262306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80); 303362306a36Sopenharmony_ci 303462306a36Sopenharmony_ci /* 303562306a36Sopenharmony_ci * Protect DDR @ 303662306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 303762306a36Sopenharmony_ci * The mask protects the first 512MB 303862306a36Sopenharmony_ci */ 303962306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 304062306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 304162306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000); 304262306a36Sopenharmony_ci WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 304362306a36Sopenharmony_ci 304462306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base); 304562306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 304662306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base); 304762306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 304862306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base); 304962306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 305062306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base); 305162306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 305262306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base); 305362306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 305462306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base); 305562306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 305662306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base); 305762306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 305862306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base); 305962306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 306062306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base); 306162306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 306262306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base); 306362306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 306462306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base); 306562306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 306662306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base); 306762306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 306862306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base); 306962306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 307062306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base); 307162306a36Sopenharmony_ci WREG32(mmTPC6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 307262306a36Sopenharmony_ci 307362306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_HIT, 0xFFFF); 307462306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_HIT, 0xFE); 307562306a36Sopenharmony_ci 307662306a36Sopenharmony_ci /* Protect HOST */ 307762306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_0, 0); 307862306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_0, 0); 307962306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_0, 0); 308062306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80); 308162306a36Sopenharmony_ci 308262306a36Sopenharmony_ci /* 308362306a36Sopenharmony_ci * Protect DDR @ 308462306a36Sopenharmony_ci * DRAM_VIRT_BASE : DRAM_VIRT_BASE + DRAM_VIRT_END 308562306a36Sopenharmony_ci * The mask protects the first 512MB 308662306a36Sopenharmony_ci */ 308762306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo); 308862306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi); 308962306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000); 309062306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF); 309162306a36Sopenharmony_ci 309262306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base); 309362306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask); 309462306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base); 309562306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask); 309662306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base); 309762306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask); 309862306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base); 309962306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask); 310062306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base); 310162306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask); 310262306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base); 310362306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask); 310462306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base); 310562306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask); 310662306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base); 310762306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask); 310862306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base); 310962306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask); 311062306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base); 311162306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask); 311262306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base); 311362306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask); 311462306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base); 311562306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask); 311662306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base); 311762306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask); 311862306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base); 311962306a36Sopenharmony_ci WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask); 312062306a36Sopenharmony_ci 312162306a36Sopenharmony_ci goya_init_protection_bits(hdev); 312262306a36Sopenharmony_ci} 312362306a36Sopenharmony_ci 312462306a36Sopenharmony_civoid goya_ack_protection_bits_errors(struct hl_device *hdev) 312562306a36Sopenharmony_ci{ 312662306a36Sopenharmony_ci 312762306a36Sopenharmony_ci} 3128