1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 3#ifndef _UAPI_ASM_X86_AMD_HSMP_H_ 4#define _UAPI_ASM_X86_AMD_HSMP_H_ 5 6#include <linux/types.h> 7 8#pragma pack(4) 9 10#define HSMP_MAX_MSG_LEN 8 11 12/* 13 * HSMP Messages supported 14 */ 15enum hsmp_message_ids { 16 HSMP_TEST = 1, /* 01h Increments input value by 1 */ 17 HSMP_GET_SMU_VER, /* 02h SMU FW version */ 18 HSMP_GET_PROTO_VER, /* 03h HSMP interface version */ 19 HSMP_GET_SOCKET_POWER, /* 04h average package power consumption */ 20 HSMP_SET_SOCKET_POWER_LIMIT, /* 05h Set the socket power limit */ 21 HSMP_GET_SOCKET_POWER_LIMIT, /* 06h Get current socket power limit */ 22 HSMP_GET_SOCKET_POWER_LIMIT_MAX,/* 07h Get maximum socket power value */ 23 HSMP_SET_BOOST_LIMIT, /* 08h Set a core maximum frequency limit */ 24 HSMP_SET_BOOST_LIMIT_SOCKET, /* 09h Set socket maximum frequency level */ 25 HSMP_GET_BOOST_LIMIT, /* 0Ah Get current frequency limit */ 26 HSMP_GET_PROC_HOT, /* 0Bh Get PROCHOT status */ 27 HSMP_SET_XGMI_LINK_WIDTH, /* 0Ch Set max and min width of xGMI Link */ 28 HSMP_SET_DF_PSTATE, /* 0Dh Alter APEnable/Disable messages behavior */ 29 HSMP_SET_AUTO_DF_PSTATE, /* 0Eh Enable DF P-State Performance Boost algorithm */ 30 HSMP_GET_FCLK_MCLK, /* 0Fh Get FCLK and MEMCLK for current socket */ 31 HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket */ 32 HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ 33 HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */ 34 HSMP_GET_NBIO_DPM_LEVEL, /* 13h Get LCLK DPM level min and max for a given NBIO */ 35 HSMP_GET_DDR_BANDWIDTH, /* 14h Get theoretical maximum and current DDR Bandwidth */ 36 HSMP_GET_TEMP_MONITOR, /* 15h Get socket temperature */ 37 HSMP_GET_DIMM_TEMP_RANGE, /* 16h Get per-DIMM temperature range and refresh rate */ 38 HSMP_GET_DIMM_POWER, /* 17h Get per-DIMM power consumption */ 39 HSMP_GET_DIMM_THERMAL, /* 18h Get per-DIMM thermal sensors */ 40 HSMP_GET_SOCKET_FREQ_LIMIT, /* 19h Get current active frequency per socket */ 41 HSMP_GET_CCLK_CORE_LIMIT, /* 1Ah Get CCLK frequency limit per core */ 42 HSMP_GET_RAILS_SVI, /* 1Bh Get SVI-based Telemetry for all rails */ 43 HSMP_GET_SOCKET_FMAX_FMIN, /* 1Ch Get Fmax and Fmin per socket */ 44 HSMP_GET_IOLINK_BANDWITH, /* 1Dh Get current bandwidth on IO Link */ 45 HSMP_GET_XGMI_BANDWITH, /* 1Eh Get current bandwidth on xGMI Link */ 46 HSMP_SET_GMI3_WIDTH, /* 1Fh Set max and min GMI3 Link width */ 47 HSMP_SET_PCI_RATE, /* 20h Control link rate on PCIe devices */ 48 HSMP_SET_POWER_MODE, /* 21h Select power efficiency profile policy */ 49 HSMP_SET_PSTATE_MAX_MIN, /* 22h Set the max and min DF P-State */ 50 HSMP_MSG_ID_MAX, 51}; 52 53struct hsmp_message { 54 __u32 msg_id; /* Message ID */ 55 __u16 num_args; /* Number of input argument words in message */ 56 __u16 response_sz; /* Number of expected output/response words */ 57 __u32 args[HSMP_MAX_MSG_LEN]; /* argument/response buffer */ 58 __u16 sock_ind; /* socket number */ 59}; 60 61enum hsmp_msg_type { 62 HSMP_RSVD = -1, 63 HSMP_SET = 0, 64 HSMP_GET = 1, 65}; 66 67struct hsmp_msg_desc { 68 int num_args; 69 int response_sz; 70 enum hsmp_msg_type type; 71}; 72 73/* 74 * User may use these comments as reference, please find the 75 * supported list of messages and message definition in the 76 * HSMP chapter of respective family/model PPR. 77 * 78 * Not supported messages would return -ENOMSG. 79 */ 80static const struct hsmp_msg_desc hsmp_msg_desc_table[] = { 81 /* RESERVED */ 82 {0, 0, HSMP_RSVD}, 83 84 /* 85 * HSMP_TEST, num_args = 1, response_sz = 1 86 * input: args[0] = xx 87 * output: args[0] = xx + 1 88 */ 89 {1, 1, HSMP_GET}, 90 91 /* 92 * HSMP_GET_SMU_VER, num_args = 0, response_sz = 1 93 * output: args[0] = smu fw ver 94 */ 95 {0, 1, HSMP_GET}, 96 97 /* 98 * HSMP_GET_PROTO_VER, num_args = 0, response_sz = 1 99 * output: args[0] = proto version 100 */ 101 {0, 1, HSMP_GET}, 102 103 /* 104 * HSMP_GET_SOCKET_POWER, num_args = 0, response_sz = 1 105 * output: args[0] = socket power in mWatts 106 */ 107 {0, 1, HSMP_GET}, 108 109 /* 110 * HSMP_SET_SOCKET_POWER_LIMIT, num_args = 1, response_sz = 0 111 * input: args[0] = power limit value in mWatts 112 */ 113 {1, 0, HSMP_SET}, 114 115 /* 116 * HSMP_GET_SOCKET_POWER_LIMIT, num_args = 0, response_sz = 1 117 * output: args[0] = socket power limit value in mWatts 118 */ 119 {0, 1, HSMP_GET}, 120 121 /* 122 * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args = 0, response_sz = 1 123 * output: args[0] = maximuam socket power limit in mWatts 124 */ 125 {0, 1, HSMP_GET}, 126 127 /* 128 * HSMP_SET_BOOST_LIMIT, num_args = 1, response_sz = 0 129 * input: args[0] = apic id[31:16] + boost limit value in MHz[15:0] 130 */ 131 {1, 0, HSMP_SET}, 132 133 /* 134 * HSMP_SET_BOOST_LIMIT_SOCKET, num_args = 1, response_sz = 0 135 * input: args[0] = boost limit value in MHz 136 */ 137 {1, 0, HSMP_SET}, 138 139 /* 140 * HSMP_GET_BOOST_LIMIT, num_args = 1, response_sz = 1 141 * input: args[0] = apic id 142 * output: args[0] = boost limit value in MHz 143 */ 144 {1, 1, HSMP_GET}, 145 146 /* 147 * HSMP_GET_PROC_HOT, num_args = 0, response_sz = 1 148 * output: args[0] = proc hot status 149 */ 150 {0, 1, HSMP_GET}, 151 152 /* 153 * HSMP_SET_XGMI_LINK_WIDTH, num_args = 1, response_sz = 0 154 * input: args[0] = min link width[15:8] + max link width[7:0] 155 */ 156 {1, 0, HSMP_SET}, 157 158 /* 159 * HSMP_SET_DF_PSTATE, num_args = 1, response_sz = 0 160 * input: args[0] = df pstate[7:0] 161 */ 162 {1, 0, HSMP_SET}, 163 164 /* HSMP_SET_AUTO_DF_PSTATE, num_args = 0, response_sz = 0 */ 165 {0, 0, HSMP_SET}, 166 167 /* 168 * HSMP_GET_FCLK_MCLK, num_args = 0, response_sz = 2 169 * output: args[0] = fclk in MHz, args[1] = mclk in MHz 170 */ 171 {0, 2, HSMP_GET}, 172 173 /* 174 * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args = 0, response_sz = 1 175 * output: args[0] = core clock in MHz 176 */ 177 {0, 1, HSMP_GET}, 178 179 /* 180 * HSMP_GET_C0_PERCENT, num_args = 0, response_sz = 1 181 * output: args[0] = average c0 residency 182 */ 183 {0, 1, HSMP_GET}, 184 185 /* 186 * HSMP_SET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 0 187 * input: args[0] = nbioid[23:16] + max dpm level[15:8] + min dpm level[7:0] 188 */ 189 {1, 0, HSMP_SET}, 190 191 /* 192 * HSMP_GET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 1 193 * input: args[0] = nbioid[23:16] 194 * output: args[0] = max dpm level[15:8] + min dpm level[7:0] 195 */ 196 {1, 1, HSMP_GET}, 197 198 /* 199 * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 200 * output: args[0] = max bw in Gbps[31:20] + utilised bw in Gbps[19:8] + 201 * bw in percentage[7:0] 202 */ 203 {0, 1, HSMP_GET}, 204 205 /* 206 * HSMP_GET_TEMP_MONITOR, num_args = 0, response_sz = 1 207 * output: args[0] = temperature in degree celsius. [15:8] integer part + 208 * [7:5] fractional part 209 */ 210 {0, 1, HSMP_GET}, 211 212 /* 213 * HSMP_GET_DIMM_TEMP_RANGE, num_args = 1, response_sz = 1 214 * input: args[0] = DIMM address[7:0] 215 * output: args[0] = refresh rate[3] + temperature range[2:0] 216 */ 217 {1, 1, HSMP_GET}, 218 219 /* 220 * HSMP_GET_DIMM_POWER, num_args = 1, response_sz = 1 221 * input: args[0] = DIMM address[7:0] 222 * output: args[0] = DIMM power in mW[31:17] + update rate in ms[16:8] + 223 * DIMM address[7:0] 224 */ 225 {1, 1, HSMP_GET}, 226 227 /* 228 * HSMP_GET_DIMM_THERMAL, num_args = 1, response_sz = 1 229 * input: args[0] = DIMM address[7:0] 230 * output: args[0] = temperature in degree celcius[31:21] + update rate in ms[16:8] + 231 * DIMM address[7:0] 232 */ 233 {1, 1, HSMP_GET}, 234 235 /* 236 * HSMP_GET_SOCKET_FREQ_LIMIT, num_args = 0, response_sz = 1 237 * output: args[0] = frequency in MHz[31:16] + frequency source[15:0] 238 */ 239 {0, 1, HSMP_GET}, 240 241 /* 242 * HSMP_GET_CCLK_CORE_LIMIT, num_args = 1, response_sz = 1 243 * input: args[0] = apic id [31:0] 244 * output: args[0] = frequency in MHz[31:0] 245 */ 246 {1, 1, HSMP_GET}, 247 248 /* 249 * HSMP_GET_RAILS_SVI, num_args = 0, response_sz = 1 250 * output: args[0] = power in mW[31:0] 251 */ 252 {0, 1, HSMP_GET}, 253 254 /* 255 * HSMP_GET_SOCKET_FMAX_FMIN, num_args = 0, response_sz = 1 256 * output: args[0] = fmax in MHz[31:16] + fmin in MHz[15:0] 257 */ 258 {0, 1, HSMP_GET}, 259 260 /* 261 * HSMP_GET_IOLINK_BANDWITH, num_args = 1, response_sz = 1 262 * input: args[0] = link id[15:8] + bw type[2:0] 263 * output: args[0] = io bandwidth in Mbps[31:0] 264 */ 265 {1, 1, HSMP_GET}, 266 267 /* 268 * HSMP_GET_XGMI_BANDWITH, num_args = 1, response_sz = 1 269 * input: args[0] = link id[15:8] + bw type[2:0] 270 * output: args[0] = xgmi bandwidth in Mbps[31:0] 271 */ 272 {1, 1, HSMP_GET}, 273 274 /* 275 * HSMP_SET_GMI3_WIDTH, num_args = 1, response_sz = 0 276 * input: args[0] = min link width[15:8] + max link width[7:0] 277 */ 278 {1, 0, HSMP_SET}, 279 280 /* 281 * HSMP_SET_PCI_RATE, num_args = 1, response_sz = 1 282 * input: args[0] = link rate control value 283 * output: args[0] = previous link rate control value 284 */ 285 {1, 1, HSMP_SET}, 286 287 /* 288 * HSMP_SET_POWER_MODE, num_args = 1, response_sz = 0 289 * input: args[0] = power efficiency mode[2:0] 290 */ 291 {1, 0, HSMP_SET}, 292 293 /* 294 * HSMP_SET_PSTATE_MAX_MIN, num_args = 1, response_sz = 0 295 * input: args[0] = min df pstate[15:8] + max df pstate[7:0] 296 */ 297 {1, 0, HSMP_SET}, 298}; 299 300/* Reset to default packing */ 301#pragma pack() 302 303/* Define unique ioctl command for hsmp msgs using generic _IOWR */ 304#define HSMP_BASE_IOCTL_NR 0xF8 305#define HSMP_IOCTL_CMD _IOWR(HSMP_BASE_IOCTL_NR, 0, struct hsmp_message) 306 307#endif /*_ASM_X86_AMD_HSMP_H_*/ 308