162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * x86 TSC related functions 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci#ifndef _ASM_X86_TSC_H 662306a36Sopenharmony_ci#define _ASM_X86_TSC_H 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <asm/processor.h> 962306a36Sopenharmony_ci#include <asm/cpufeature.h> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/* 1262306a36Sopenharmony_ci * Standard way to access the cycle counter. 1362306a36Sopenharmony_ci */ 1462306a36Sopenharmony_citypedef unsigned long long cycles_t; 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciextern unsigned int cpu_khz; 1762306a36Sopenharmony_ciextern unsigned int tsc_khz; 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciextern void disable_TSC(void); 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistatic inline cycles_t get_cycles(void) 2262306a36Sopenharmony_ci{ 2362306a36Sopenharmony_ci if (!IS_ENABLED(CONFIG_X86_TSC) && 2462306a36Sopenharmony_ci !cpu_feature_enabled(X86_FEATURE_TSC)) 2562306a36Sopenharmony_ci return 0; 2662306a36Sopenharmony_ci return rdtsc(); 2762306a36Sopenharmony_ci} 2862306a36Sopenharmony_ci#define get_cycles get_cycles 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciextern struct system_counterval_t convert_art_to_tsc(u64 art); 3162306a36Sopenharmony_ciextern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns); 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ciextern void tsc_early_init(void); 3462306a36Sopenharmony_ciextern void tsc_init(void); 3562306a36Sopenharmony_ciextern void mark_tsc_unstable(char *reason); 3662306a36Sopenharmony_ciextern int unsynchronized_tsc(void); 3762306a36Sopenharmony_ciextern int check_tsc_unstable(void); 3862306a36Sopenharmony_ciextern void mark_tsc_async_resets(char *reason); 3962306a36Sopenharmony_ciextern unsigned long native_calibrate_cpu_early(void); 4062306a36Sopenharmony_ciextern unsigned long native_calibrate_tsc(void); 4162306a36Sopenharmony_ciextern unsigned long long native_sched_clock_from_tsc(u64 tsc); 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ciextern int tsc_clocksource_reliable; 4462306a36Sopenharmony_ci#ifdef CONFIG_X86_TSC 4562306a36Sopenharmony_ciextern bool tsc_async_resets; 4662306a36Sopenharmony_ci#else 4762306a36Sopenharmony_ci# define tsc_async_resets false 4862306a36Sopenharmony_ci#endif 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci/* 5162306a36Sopenharmony_ci * Boot-time check whether the TSCs are synchronized across 5262306a36Sopenharmony_ci * all CPUs/cores: 5362306a36Sopenharmony_ci */ 5462306a36Sopenharmony_ci#ifdef CONFIG_X86_TSC 5562306a36Sopenharmony_ciextern bool tsc_store_and_check_tsc_adjust(bool bootcpu); 5662306a36Sopenharmony_ciextern void tsc_verify_tsc_adjust(bool resume); 5762306a36Sopenharmony_ciextern void check_tsc_sync_target(void); 5862306a36Sopenharmony_ci#else 5962306a36Sopenharmony_cistatic inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; } 6062306a36Sopenharmony_cistatic inline void tsc_verify_tsc_adjust(bool resume) { } 6162306a36Sopenharmony_cistatic inline void check_tsc_sync_target(void) { } 6262306a36Sopenharmony_ci#endif 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ciextern int notsc_setup(char *); 6562306a36Sopenharmony_ciextern void tsc_save_sched_clock_state(void); 6662306a36Sopenharmony_ciextern void tsc_restore_sched_clock_state(void); 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ciunsigned long cpu_khz_from_msr(void); 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci#endif /* _ASM_X86_TSC_H */ 71