1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_MICROCODE_H
3#define _ASM_X86_MICROCODE_H
4
5struct cpu_signature {
6	unsigned int sig;
7	unsigned int pf;
8	unsigned int rev;
9};
10
11struct ucode_cpu_info {
12	struct cpu_signature	cpu_sig;
13	void			*mc;
14};
15
16#ifdef CONFIG_MICROCODE
17void load_ucode_bsp(void);
18void load_ucode_ap(void);
19void microcode_bsp_resume(void);
20#else
21static inline void load_ucode_bsp(void)	{ }
22static inline void load_ucode_ap(void) { }
23static inline void microcode_bsp_resume(void) { }
24#endif
25
26#ifdef CONFIG_CPU_SUP_INTEL
27/* Intel specific microcode defines. Public for IFS */
28struct microcode_header_intel {
29	unsigned int	hdrver;
30	unsigned int	rev;
31	unsigned int	date;
32	unsigned int	sig;
33	unsigned int	cksum;
34	unsigned int	ldrver;
35	unsigned int	pf;
36	unsigned int	datasize;
37	unsigned int	totalsize;
38	unsigned int	metasize;
39	unsigned int	reserved[2];
40};
41
42struct microcode_intel {
43	struct microcode_header_intel	hdr;
44	unsigned int			bits[];
45};
46
47#define DEFAULT_UCODE_DATASIZE		(2000)
48#define MC_HEADER_SIZE			(sizeof(struct microcode_header_intel))
49#define MC_HEADER_TYPE_MICROCODE	1
50#define MC_HEADER_TYPE_IFS		2
51
52static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
53{
54	return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
55}
56
57static inline u32 intel_get_microcode_revision(void)
58{
59	u32 rev, dummy;
60
61	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
62
63	/* As documented in the SDM: Do a CPUID 1 here */
64	native_cpuid_eax(1);
65
66	/* get the current revision from MSR 0x8B */
67	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
68
69	return rev;
70}
71
72void show_ucode_info_early(void);
73
74#else /* CONFIG_CPU_SUP_INTEL */
75static inline void show_ucode_info_early(void) { }
76#endif /* !CONFIG_CPU_SUP_INTEL */
77
78#endif /* _ASM_X86_MICROCODE_H */
79