162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci#ifndef _ASM_X86_AGP_H
362306a36Sopenharmony_ci#define _ASM_X86_AGP_H
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci#include <linux/pgtable.h>
662306a36Sopenharmony_ci#include <asm/cacheflush.h>
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci/*
962306a36Sopenharmony_ci * Functions to keep the agpgart mappings coherent with the MMU. The
1062306a36Sopenharmony_ci * GART gives the CPU a physical alias of pages in memory. The alias
1162306a36Sopenharmony_ci * region is mapped uncacheable. Make sure there are no conflicting
1262306a36Sopenharmony_ci * mappings with different cacheability attributes for the same
1362306a36Sopenharmony_ci * page. This avoids data corruption on some CPUs.
1462306a36Sopenharmony_ci */
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#define map_page_into_agp(page) set_pages_uc(page, 1)
1762306a36Sopenharmony_ci#define unmap_page_from_agp(page) set_pages_wb(page, 1)
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci/*
2062306a36Sopenharmony_ci * Could use CLFLUSH here if the cpu supports it. But then it would
2162306a36Sopenharmony_ci * need to be called for each cacheline of the whole page so it may
2262306a36Sopenharmony_ci * not be worth it. Would need a page for it.
2362306a36Sopenharmony_ci */
2462306a36Sopenharmony_ci#define flush_agp_cache() wbinvd()
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci#endif /* _ASM_X86_AGP_H */
27