162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * psr.h: This file holds the macros for masking off various parts of 462306a36Sopenharmony_ci * the processor status register on the Sparc. This is valid 562306a36Sopenharmony_ci * for Version 8. On the V9 this is renamed to the PSTATE 662306a36Sopenharmony_ci * register and its members are accessed as fields like 762306a36Sopenharmony_ci * PSTATE.PRIV for the current CPU privilege level. 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#ifndef _UAPI__LINUX_SPARC_PSR_H 1362306a36Sopenharmony_ci#define _UAPI__LINUX_SPARC_PSR_H 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci/* The Sparc PSR fields are laid out as the following: 1662306a36Sopenharmony_ci * 1762306a36Sopenharmony_ci * ------------------------------------------------------------------------ 1862306a36Sopenharmony_ci * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP | 1962306a36Sopenharmony_ci * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 | 2062306a36Sopenharmony_ci * ------------------------------------------------------------------------ 2162306a36Sopenharmony_ci */ 2262306a36Sopenharmony_ci#define PSR_CWP 0x0000001f /* current window pointer */ 2362306a36Sopenharmony_ci#define PSR_ET 0x00000020 /* enable traps field */ 2462306a36Sopenharmony_ci#define PSR_PS 0x00000040 /* previous privilege level */ 2562306a36Sopenharmony_ci#define PSR_S 0x00000080 /* current privilege level */ 2662306a36Sopenharmony_ci#define PSR_PIL 0x00000f00 /* processor interrupt level */ 2762306a36Sopenharmony_ci#define PSR_EF 0x00001000 /* enable floating point */ 2862306a36Sopenharmony_ci#define PSR_EC 0x00002000 /* enable co-processor */ 2962306a36Sopenharmony_ci#define PSR_SYSCALL 0x00004000 /* inside of a syscall */ 3062306a36Sopenharmony_ci#define PSR_LE 0x00008000 /* SuperSparcII little-endian */ 3162306a36Sopenharmony_ci#define PSR_ICC 0x00f00000 /* integer condition codes */ 3262306a36Sopenharmony_ci#define PSR_C 0x00100000 /* carry bit */ 3362306a36Sopenharmony_ci#define PSR_V 0x00200000 /* overflow bit */ 3462306a36Sopenharmony_ci#define PSR_Z 0x00400000 /* zero bit */ 3562306a36Sopenharmony_ci#define PSR_N 0x00800000 /* negative bit */ 3662306a36Sopenharmony_ci#define PSR_VERS 0x0f000000 /* cpu-version field */ 3762306a36Sopenharmony_ci#define PSR_IMPL 0xf0000000 /* cpu-implementation field */ 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci#define PSR_VERS_SHIFT 24 4062306a36Sopenharmony_ci#define PSR_IMPL_SHIFT 28 4162306a36Sopenharmony_ci#define PSR_VERS_SHIFTED_MASK 0xf 4262306a36Sopenharmony_ci#define PSR_IMPL_SHIFTED_MASK 0xf 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci#define PSR_IMPL_TI 0x4 4562306a36Sopenharmony_ci#define PSR_IMPL_LEON 0xf 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci#endif /* _UAPI__LINUX_SPARC_PSR_H */ 49