162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef __SPARC64_SWITCH_TO_64_H 362306a36Sopenharmony_ci#define __SPARC64_SWITCH_TO_64_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#include <asm/visasm.h> 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#define prepare_arch_switch(next) \ 862306a36Sopenharmony_cido { \ 962306a36Sopenharmony_ci flushw_all(); \ 1062306a36Sopenharmony_ci} while (0) 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci /* See what happens when you design the chip correctly? 1362306a36Sopenharmony_ci * 1462306a36Sopenharmony_ci * We tell gcc we clobber all non-fixed-usage registers except 1562306a36Sopenharmony_ci * for l0/l1. It will use one for 'next' and the other to hold 1662306a36Sopenharmony_ci * the output value of 'last'. 'next' is not referenced again 1762306a36Sopenharmony_ci * past the invocation of switch_to in the scheduler, so we need 1862306a36Sopenharmony_ci * not preserve it's value. Hairy, but it lets us remove 2 loads 1962306a36Sopenharmony_ci * and 2 stores in this critical code path. -DaveM 2062306a36Sopenharmony_ci */ 2162306a36Sopenharmony_ci#define switch_to(prev, next, last) \ 2262306a36Sopenharmony_cido { save_and_clear_fpu(); \ 2362306a36Sopenharmony_ci __asm__ __volatile__("wr %%g0, %0, %%asi" \ 2462306a36Sopenharmony_ci : : "r" (ASI_AIUS)); \ 2562306a36Sopenharmony_ci trap_block[current_thread_info()->cpu].thread = \ 2662306a36Sopenharmony_ci task_thread_info(next); \ 2762306a36Sopenharmony_ci __asm__ __volatile__( \ 2862306a36Sopenharmony_ci "mov %%g4, %%g7\n\t" \ 2962306a36Sopenharmony_ci "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ 3062306a36Sopenharmony_ci "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ 3162306a36Sopenharmony_ci "rdpr %%wstate, %%o5\n\t" \ 3262306a36Sopenharmony_ci "stx %%o6, [%%g6 + %6]\n\t" \ 3362306a36Sopenharmony_ci "stb %%o5, [%%g6 + %5]\n\t" \ 3462306a36Sopenharmony_ci "rdpr %%cwp, %%o5\n\t" \ 3562306a36Sopenharmony_ci "stb %%o5, [%%g6 + %8]\n\t" \ 3662306a36Sopenharmony_ci "wrpr %%g0, 15, %%pil\n\t" \ 3762306a36Sopenharmony_ci "mov %4, %%g6\n\t" \ 3862306a36Sopenharmony_ci "ldub [%4 + %8], %%g1\n\t" \ 3962306a36Sopenharmony_ci "wrpr %%g1, %%cwp\n\t" \ 4062306a36Sopenharmony_ci "ldx [%%g6 + %6], %%o6\n\t" \ 4162306a36Sopenharmony_ci "ldub [%%g6 + %5], %%o5\n\t" \ 4262306a36Sopenharmony_ci "ldub [%%g6 + %7], %%o7\n\t" \ 4362306a36Sopenharmony_ci "wrpr %%o5, 0x0, %%wstate\n\t" \ 4462306a36Sopenharmony_ci "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ 4562306a36Sopenharmony_ci "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ 4662306a36Sopenharmony_ci "ldx [%%g6 + %9], %%g4\n\t" \ 4762306a36Sopenharmony_ci "wrpr %%g0, 14, %%pil\n\t" \ 4862306a36Sopenharmony_ci "brz,pt %%o7, switch_to_pc\n\t" \ 4962306a36Sopenharmony_ci " mov %%g7, %0\n\t" \ 5062306a36Sopenharmony_ci "sethi %%hi(ret_from_fork), %%g1\n\t" \ 5162306a36Sopenharmony_ci "jmpl %%g1 + %%lo(ret_from_fork), %%g0\n\t" \ 5262306a36Sopenharmony_ci " nop\n\t" \ 5362306a36Sopenharmony_ci ".globl switch_to_pc\n\t" \ 5462306a36Sopenharmony_ci "switch_to_pc:\n\t" \ 5562306a36Sopenharmony_ci : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ 5662306a36Sopenharmony_ci "=r" (__local_per_cpu_offset) \ 5762306a36Sopenharmony_ci : "0" (task_thread_info(next)), \ 5862306a36Sopenharmony_ci "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ 5962306a36Sopenharmony_ci "i" (TI_CWP), "i" (TI_TASK) \ 6062306a36Sopenharmony_ci : "cc", \ 6162306a36Sopenharmony_ci "g1", "g2", "g3", "g7", \ 6262306a36Sopenharmony_ci "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ 6362306a36Sopenharmony_ci "i0", "i1", "i2", "i3", "i4", "i5", \ 6462306a36Sopenharmony_ci "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ 6562306a36Sopenharmony_ci} while(0) 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_civoid synchronize_user_stack(void); 6862306a36Sopenharmony_cistruct pt_regs; 6962306a36Sopenharmony_civoid fault_in_user_windows(struct pt_regs *); 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci#endif /* __SPARC64_SWITCH_TO_64_H */ 72