162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
262306a36Sopenharmony_ci *
362306a36Sopenharmony_ci * Copyright (C) 2006 Free Software Foundation, Inc.
462306a36Sopenharmony_ci */
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/* Moderately Space-optimized libgcc routines for the Renesas SH /
762306a36Sopenharmony_ci   STMicroelectronics ST40 CPUs.
862306a36Sopenharmony_ci   Contributed by J"orn Rennecke joern.rennecke@st.com.  */
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
1162306a36Sopenharmony_ci   sh4-200 run times:
1262306a36Sopenharmony_ci   udiv small divisor: 55 cycles
1362306a36Sopenharmony_ci   udiv large divisor: 52 cycles
1462306a36Sopenharmony_ci   sdiv small divisor, positive result: 59 cycles
1562306a36Sopenharmony_ci   sdiv large divisor, positive result: 56 cycles
1662306a36Sopenharmony_ci   sdiv small divisor, negative result: 65 cycles (*)
1762306a36Sopenharmony_ci   sdiv large divisor, negative result: 62 cycles (*)
1862306a36Sopenharmony_ci   (*): r2 is restored in the rts delay slot and has a lingering latency
1962306a36Sopenharmony_ci        of two more cycles.  */
2062306a36Sopenharmony_ci	.balign 4
2162306a36Sopenharmony_ci	.global	__udivsi3_i4i
2262306a36Sopenharmony_ci	.global	__udivsi3_i4
2362306a36Sopenharmony_ci	.set	__udivsi3_i4, __udivsi3_i4i
2462306a36Sopenharmony_ci	.type	__udivsi3_i4i, @function
2562306a36Sopenharmony_ci	.type	__sdivsi3_i4i, @function
2662306a36Sopenharmony_ci__udivsi3_i4i:
2762306a36Sopenharmony_ci	sts pr,r1
2862306a36Sopenharmony_ci	mov.l r4,@-r15
2962306a36Sopenharmony_ci	extu.w r5,r0
3062306a36Sopenharmony_ci	cmp/eq r5,r0
3162306a36Sopenharmony_ci	swap.w r4,r0
3262306a36Sopenharmony_ci	shlr16 r4
3362306a36Sopenharmony_ci	bf/s large_divisor
3462306a36Sopenharmony_ci	div0u
3562306a36Sopenharmony_ci	mov.l r5,@-r15
3662306a36Sopenharmony_ci	shll16 r5
3762306a36Sopenharmony_cisdiv_small_divisor:
3862306a36Sopenharmony_ci	div1 r5,r4
3962306a36Sopenharmony_ci	bsr div6
4062306a36Sopenharmony_ci	div1 r5,r4
4162306a36Sopenharmony_ci	div1 r5,r4
4262306a36Sopenharmony_ci	bsr div6
4362306a36Sopenharmony_ci	div1 r5,r4
4462306a36Sopenharmony_ci	xtrct r4,r0
4562306a36Sopenharmony_ci	xtrct r0,r4
4662306a36Sopenharmony_ci	bsr div7
4762306a36Sopenharmony_ci	swap.w r4,r4
4862306a36Sopenharmony_ci	div1 r5,r4
4962306a36Sopenharmony_ci	bsr div7
5062306a36Sopenharmony_ci	div1 r5,r4
5162306a36Sopenharmony_ci	xtrct r4,r0
5262306a36Sopenharmony_ci	mov.l @r15+,r5
5362306a36Sopenharmony_ci	swap.w r0,r0
5462306a36Sopenharmony_ci	mov.l @r15+,r4
5562306a36Sopenharmony_ci	jmp @r1
5662306a36Sopenharmony_ci	rotcl r0
5762306a36Sopenharmony_cidiv7:
5862306a36Sopenharmony_ci	div1 r5,r4
5962306a36Sopenharmony_cidiv6:
6062306a36Sopenharmony_ci	            div1 r5,r4; div1 r5,r4; div1 r5,r4
6162306a36Sopenharmony_ci	div1 r5,r4; div1 r5,r4; rts;        div1 r5,r4
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_cidivx3:
6462306a36Sopenharmony_ci	rotcl r0
6562306a36Sopenharmony_ci	div1 r5,r4
6662306a36Sopenharmony_ci	rotcl r0
6762306a36Sopenharmony_ci	div1 r5,r4
6862306a36Sopenharmony_ci	rotcl r0
6962306a36Sopenharmony_ci	rts
7062306a36Sopenharmony_ci	div1 r5,r4
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_cilarge_divisor:
7362306a36Sopenharmony_ci	mov.l r5,@-r15
7462306a36Sopenharmony_cisdiv_large_divisor:
7562306a36Sopenharmony_ci	xor r4,r0
7662306a36Sopenharmony_ci	.rept 4
7762306a36Sopenharmony_ci	rotcl r0
7862306a36Sopenharmony_ci	bsr divx3
7962306a36Sopenharmony_ci	div1 r5,r4
8062306a36Sopenharmony_ci	.endr
8162306a36Sopenharmony_ci	mov.l @r15+,r5
8262306a36Sopenharmony_ci	mov.l @r15+,r4
8362306a36Sopenharmony_ci	jmp @r1
8462306a36Sopenharmony_ci	rotcl r0
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ci	.global	__sdivsi3_i4i
8762306a36Sopenharmony_ci	.global __sdivsi3_i4
8862306a36Sopenharmony_ci	.global __sdivsi3
8962306a36Sopenharmony_ci	.set	__sdivsi3_i4, __sdivsi3_i4i
9062306a36Sopenharmony_ci	.set	__sdivsi3, __sdivsi3_i4i
9162306a36Sopenharmony_ci__sdivsi3_i4i:
9262306a36Sopenharmony_ci	mov.l r4,@-r15
9362306a36Sopenharmony_ci	cmp/pz r5
9462306a36Sopenharmony_ci	mov.l r5,@-r15
9562306a36Sopenharmony_ci	bt/s pos_divisor
9662306a36Sopenharmony_ci	cmp/pz r4
9762306a36Sopenharmony_ci	neg r5,r5
9862306a36Sopenharmony_ci	extu.w r5,r0
9962306a36Sopenharmony_ci	bt/s neg_result
10062306a36Sopenharmony_ci	cmp/eq r5,r0
10162306a36Sopenharmony_ci	neg r4,r4
10262306a36Sopenharmony_cipos_result:
10362306a36Sopenharmony_ci	swap.w r4,r0
10462306a36Sopenharmony_ci	bra sdiv_check_divisor
10562306a36Sopenharmony_ci	sts pr,r1
10662306a36Sopenharmony_cipos_divisor:
10762306a36Sopenharmony_ci	extu.w r5,r0
10862306a36Sopenharmony_ci	bt/s pos_result
10962306a36Sopenharmony_ci	cmp/eq r5,r0
11062306a36Sopenharmony_ci	neg r4,r4
11162306a36Sopenharmony_cineg_result:
11262306a36Sopenharmony_ci	mova negate_result,r0
11362306a36Sopenharmony_ci	;
11462306a36Sopenharmony_ci	mov r0,r1
11562306a36Sopenharmony_ci	swap.w r4,r0
11662306a36Sopenharmony_ci	lds r2,macl
11762306a36Sopenharmony_ci	sts pr,r2
11862306a36Sopenharmony_cisdiv_check_divisor:
11962306a36Sopenharmony_ci	shlr16 r4
12062306a36Sopenharmony_ci	bf/s sdiv_large_divisor
12162306a36Sopenharmony_ci	div0u
12262306a36Sopenharmony_ci	bra sdiv_small_divisor
12362306a36Sopenharmony_ci	shll16 r5
12462306a36Sopenharmony_ci	.balign 4
12562306a36Sopenharmony_cinegate_result:
12662306a36Sopenharmony_ci	neg r0,r0
12762306a36Sopenharmony_ci	jmp @r2
12862306a36Sopenharmony_ci	sts macl,r2
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