162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 262306a36Sopenharmony_ci#ifndef __ASM_SH_CPU_FEATURES_H 362306a36Sopenharmony_ci#define __ASM_SH_CPU_FEATURES_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci/* 662306a36Sopenharmony_ci * Processor flags 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Note: When adding a new flag, keep cpu_flags[] in 962306a36Sopenharmony_ci * arch/sh/kernel/setup.c in sync so symbolic name 1062306a36Sopenharmony_ci * mapping of the processor flags has a chance of being 1162306a36Sopenharmony_ci * reasonably accurate. 1262306a36Sopenharmony_ci * 1362306a36Sopenharmony_ci * These flags are also available through the ELF 1462306a36Sopenharmony_ci * auxiliary vector as AT_HWCAP. 1562306a36Sopenharmony_ci */ 1662306a36Sopenharmony_ci#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ 1762306a36Sopenharmony_ci#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ 1862306a36Sopenharmony_ci#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ 1962306a36Sopenharmony_ci#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ 2062306a36Sopenharmony_ci#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ 2162306a36Sopenharmony_ci#define CPU_HAS_PTEA 0x0020 /* PTEA register */ 2262306a36Sopenharmony_ci#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ 2362306a36Sopenharmony_ci#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ 2462306a36Sopenharmony_ci#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ 2562306a36Sopenharmony_ci#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */ 2662306a36Sopenharmony_ci#define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */ 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci#endif /* __ASM_SH_CPU_FEATURES_H */ 29