162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci#ifndef __ASM_SH_RENESAS_SH7785LCR_H
362306a36Sopenharmony_ci#define __ASM_SH_RENESAS_SH7785LCR_H
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci/*
662306a36Sopenharmony_ci * This board has 2 physical memory maps.
762306a36Sopenharmony_ci * It can be changed with DIP switch(S2-5).
862306a36Sopenharmony_ci *
962306a36Sopenharmony_ci * phys address			| S2-5 = OFF	| S2-5 = ON
1062306a36Sopenharmony_ci * -----------------------------+---------------+---------------
1162306a36Sopenharmony_ci * 0x00000000 - 0x03ffffff(CS0)	| NOR Flash	| NOR Flash
1262306a36Sopenharmony_ci * 0x04000000 - 0x05ffffff(CS1)	| PLD		| PLD
1362306a36Sopenharmony_ci * 0x06000000 - 0x07ffffff(CS1)	| I2C		| I2C
1462306a36Sopenharmony_ci * 0x08000000 - 0x0bffffff(CS2)	| USB		| DDR SDRAM
1562306a36Sopenharmony_ci * 0x0c000000 - 0x0fffffff(CS3)	| SD		| DDR SDRAM
1662306a36Sopenharmony_ci * 0x10000000 - 0x13ffffff(CS4)	| SM107		| SM107
1762306a36Sopenharmony_ci * 0x14000000 - 0x17ffffff(CS5)	| reserved	| USB
1862306a36Sopenharmony_ci * 0x18000000 - 0x1bffffff(CS6)	| reserved	| SD
1962306a36Sopenharmony_ci * 0x40000000 - 0x5fffffff	| DDR SDRAM	| (cannot use)
2062306a36Sopenharmony_ci *
2162306a36Sopenharmony_ci */
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci#define NOR_FLASH_ADDR		0x00000000
2462306a36Sopenharmony_ci#define NOR_FLASH_SIZE		0x04000000
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci#define PLD_BASE_ADDR		0x04000000
2762306a36Sopenharmony_ci#define PLD_PCICR		(PLD_BASE_ADDR + 0x00)
2862306a36Sopenharmony_ci#define PLD_LCD_BK_CONTR	(PLD_BASE_ADDR + 0x02)
2962306a36Sopenharmony_ci#define PLD_LOCALCR		(PLD_BASE_ADDR + 0x04)
3062306a36Sopenharmony_ci#define PLD_POFCR		(PLD_BASE_ADDR + 0x06)
3162306a36Sopenharmony_ci#define PLD_LEDCR		(PLD_BASE_ADDR + 0x08)
3262306a36Sopenharmony_ci#define PLD_SWSR		(PLD_BASE_ADDR + 0x0a)
3362306a36Sopenharmony_ci#define PLD_VERSR		(PLD_BASE_ADDR + 0x0c)
3462306a36Sopenharmony_ci#define PLD_MMSR		(PLD_BASE_ADDR + 0x0e)
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci#define PCA9564_ADDR		0x06000000	/* I2C */
3762306a36Sopenharmony_ci#define PCA9564_SIZE		0x00000100
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci#define PCA9564_PROTO_32BIT_ADDR	0x14000000
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#define SM107_MEM_ADDR		0x10000000
4262306a36Sopenharmony_ci#define SM107_MEM_SIZE		0x00e00000
4362306a36Sopenharmony_ci#define SM107_REG_ADDR		0x13e00000
4462306a36Sopenharmony_ci#define SM107_REG_SIZE		0x00200000
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci#if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS)
4762306a36Sopenharmony_ci#define R8A66597_ADDR		0x14000000	/* USB */
4862306a36Sopenharmony_ci#define CG200_ADDR		0x18000000	/* SD */
4962306a36Sopenharmony_ci#else
5062306a36Sopenharmony_ci#define R8A66597_ADDR		0x08000000
5162306a36Sopenharmony_ci#define CG200_ADDR		0x0c000000
5262306a36Sopenharmony_ci#endif
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci#define R8A66597_SIZE		0x00000100
5562306a36Sopenharmony_ci#define CG200_SIZE		0x00010000
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci#endif  /* __ASM_SH_RENESAS_SH7785LCR_H */
5862306a36Sopenharmony_ci
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