162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef __ASM_SH_RENESAS_RTS7751R2D_H 362306a36Sopenharmony_ci#define __ASM_SH_RENESAS_RTS7751R2D_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci/* 662306a36Sopenharmony_ci * linux/include/asm-sh/renesas_rts7751r2d.h 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Copyright (C) 2000 Atom Create Engineering Co., Ltd. 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * Renesas Technology Sales RTS7751R2D support 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/* Board specific addresses. */ 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define PA_BCR 0xa4000000 /* FPGA */ 1662306a36Sopenharmony_ci#define PA_IRLMON 0xa4000002 /* Interrupt Status control */ 1762306a36Sopenharmony_ci#define PA_CFCTL 0xa4000004 /* CF Timing control */ 1862306a36Sopenharmony_ci#define PA_CFPOW 0xa4000006 /* CF Power control */ 1962306a36Sopenharmony_ci#define PA_DISPCTL 0xa4000008 /* Display Timing control */ 2062306a36Sopenharmony_ci#define PA_SDMPOW 0xa400000a /* SD Power control */ 2162306a36Sopenharmony_ci#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ 2262306a36Sopenharmony_ci#define PA_PCICD 0xa400000e /* PCI Extension detect control */ 2362306a36Sopenharmony_ci#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci#define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ 2662306a36Sopenharmony_ci#define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ 2762306a36Sopenharmony_ci#define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ 2862306a36Sopenharmony_ci#define PA_R2D1_EXTRST 0xa4000028 /* Extension Reset control */ 2962306a36Sopenharmony_ci#define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ 3262306a36Sopenharmony_ci#define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ 3362306a36Sopenharmony_ci#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extension Reset control */ 3462306a36Sopenharmony_ci#define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ 3562306a36Sopenharmony_ci#define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#define PA_POWOFF 0xa4000030 /* Board Power OFF control */ 3862306a36Sopenharmony_ci#define PA_VERREG 0xa4000032 /* FPGA Version Register */ 3962306a36Sopenharmony_ci#define PA_INPORT 0xa4000034 /* KEY Input Port control */ 4062306a36Sopenharmony_ci#define PA_OUTPORT 0xa4000036 /* LED control */ 4162306a36Sopenharmony_ci#define PA_BVERREG 0xa4000038 /* Board Revision Register */ 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#define PA_AX88796L 0xaa000400 /* AX88796L Area */ 4462306a36Sopenharmony_ci#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ 4562306a36Sopenharmony_ci#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ 4662306a36Sopenharmony_ci#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci#define R2D_FPGA_IRQ_BASE (100 + 16) 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0) 5362306a36Sopenharmony_ci#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1) 5462306a36Sopenharmony_ci#define IRQ_TP (R2D_FPGA_IRQ_BASE + 2) 5562306a36Sopenharmony_ci#define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3) 5662306a36Sopenharmony_ci#define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4) 5762306a36Sopenharmony_ci#define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5) 5862306a36Sopenharmony_ci#define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6) 5962306a36Sopenharmony_ci#define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7) 6062306a36Sopenharmony_ci#define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8) 6162306a36Sopenharmony_ci#define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9) 6262306a36Sopenharmony_ci#define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10) 6362306a36Sopenharmony_ci#define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11) 6462306a36Sopenharmony_ci#define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12) 6562306a36Sopenharmony_ci#define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13) 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci/* arch/sh/boards/renesas/rts7751r2d/irq.c */ 6862306a36Sopenharmony_civoid init_rts7751r2d_IRQ(void); 6962306a36Sopenharmony_ciint rts7751r2d_irq_demux(int); 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci#endif /* __ASM_SH_RENESAS_RTS7751R2D */ 72