162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci * 362306a36Sopenharmony_ci * linux/include/asm-sh/microdev.h 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Definitions for the SuperH SH4-202 MicroDev board. 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci#ifndef __ASM_SH_MICRODEV_H 1062306a36Sopenharmony_ci#define __ASM_SH_MICRODEV_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciextern void init_microdev_irq(void); 1362306a36Sopenharmony_ciextern void microdev_print_fpga_intc_status(void); 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci/* 1662306a36Sopenharmony_ci * The following are useful macros for manipulating the interrupt 1762306a36Sopenharmony_ci * controller (INTC) on the CPU-board FPGA. should be noted that there 1862306a36Sopenharmony_ci * is an INTC on the FPGA, and a separate INTC on the SH4-202 core - 1962306a36Sopenharmony_ci * these are two different things, both of which need to be prorammed to 2062306a36Sopenharmony_ci * correctly route - unfortunately, they have the same name and 2162306a36Sopenharmony_ci * abbreviations! 2262306a36Sopenharmony_ci */ 2362306a36Sopenharmony_ci#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ 2462306a36Sopenharmony_ci#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ 2562306a36Sopenharmony_ci#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ 2662306a36Sopenharmony_ci#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */ 2762306a36Sopenharmony_ci#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ 2862306a36Sopenharmony_ci#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ 2962306a36Sopenharmony_ci#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ 3062306a36Sopenharmony_ci#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ 3162306a36Sopenharmony_ci#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci/* 3562306a36Sopenharmony_ci * The following are the IRQ numbers for the Linux Kernel for external 3662306a36Sopenharmony_ci * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'. 3762306a36Sopenharmony_ci */ 3862306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 3962306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ 4062306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ 4162306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 4262306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ 4362306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 4462306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ 4562306a36Sopenharmony_ci#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci/* 4862306a36Sopenharmony_ci * The following are the IRQ numbers for the INTC on the FPGA for 4962306a36Sopenharmony_ci * external interrupts. i.e. the bits in the INTC registers in the 5062306a36Sopenharmony_ci * FPGA. 5162306a36Sopenharmony_ci */ 5262306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 5362306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ 5462306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 5562306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 5662306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ 5762306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ 5862306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ 5962306a36Sopenharmony_ci#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci#define MICRODEV_IRQ_PCI_INTA 8 6262306a36Sopenharmony_ci#define MICRODEV_IRQ_PCI_INTB 9 6362306a36Sopenharmony_ci#define MICRODEV_IRQ_PCI_INTC 10 6462306a36Sopenharmony_ci#define MICRODEV_IRQ_PCI_INTD 11 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci#define __IO_PREFIX microdev 6762306a36Sopenharmony_ci#include <asm/io_generic.h> 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci#endif /* __ASM_SH_MICRODEV_H */ 70