162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H 362306a36Sopenharmony_ci#define __ASM_SH_CPU_SH4_DMA_SH7780_H 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci#include <linux/sh_intc.h> 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 862306a36Sopenharmony_ci defined(CONFIG_CPU_SUBTYPE_SH7730) 962306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x800) 1062306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0xb80) 1162306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 1262306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFE008020 1362306a36Sopenharmony_ci#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 1462306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x800) 1562306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0xb80) 1662306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 1762306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFE008020 1862306a36Sopenharmony_ci#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 1962306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x640) 2062306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0x780) 2162306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0x6c0) 2262306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFF608020 2362306a36Sopenharmony_ci#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 2462306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ 2562306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ 2662306a36Sopenharmony_ci#define DMTE6_IRQ evt2irq(0x700) 2762306a36Sopenharmony_ci#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ 2862306a36Sopenharmony_ci#define DMTE9_IRQ evt2irq(0x760) 2962306a36Sopenharmony_ci#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ 3062306a36Sopenharmony_ci#define DMTE11_IRQ evt2irq(0xb20) 3162306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 3262306a36Sopenharmony_ci#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ 3362306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFE008020 3462306a36Sopenharmony_ci#define SH_DMAC_BASE1 0xFDC08020 3562306a36Sopenharmony_ci#elif defined(CONFIG_CPU_SUBTYPE_SH7724) 3662306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ 3762306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ 3862306a36Sopenharmony_ci#define DMTE6_IRQ evt2irq(0x700) 3962306a36Sopenharmony_ci#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ 4062306a36Sopenharmony_ci#define DMTE9_IRQ evt2irq(0x760) 4162306a36Sopenharmony_ci#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ 4262306a36Sopenharmony_ci#define DMTE11_IRQ evt2irq(0xb20) 4362306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 4462306a36Sopenharmony_ci#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ 4562306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFE008020 4662306a36Sopenharmony_ci#define SH_DMAC_BASE1 0xFDC08020 4762306a36Sopenharmony_ci#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 4862306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x640) 4962306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0x780) 5062306a36Sopenharmony_ci#define DMTE6_IRQ evt2irq(0x7c0) 5162306a36Sopenharmony_ci#define DMTE8_IRQ evt2irq(0xd80) 5262306a36Sopenharmony_ci#define DMTE9_IRQ evt2irq(0xda0) 5362306a36Sopenharmony_ci#define DMTE10_IRQ evt2irq(0xdc0) 5462306a36Sopenharmony_ci#define DMTE11_IRQ evt2irq(0xde0) 5562306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */ 5662306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFC808020 5762306a36Sopenharmony_ci#define SH_DMAC_BASE1 0xFC818020 5862306a36Sopenharmony_ci#else /* SH7785 */ 5962306a36Sopenharmony_ci#define DMTE0_IRQ evt2irq(0x620) 6062306a36Sopenharmony_ci#define DMTE4_IRQ evt2irq(0x6a0) 6162306a36Sopenharmony_ci#define DMTE6_IRQ evt2irq(0x880) 6262306a36Sopenharmony_ci#define DMTE8_IRQ evt2irq(0x8c0) 6362306a36Sopenharmony_ci#define DMTE9_IRQ evt2irq(0x8e0) 6462306a36Sopenharmony_ci#define DMTE10_IRQ evt2irq(0x900) 6562306a36Sopenharmony_ci#define DMTE11_IRQ evt2irq(0x920) 6662306a36Sopenharmony_ci#define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */ 6762306a36Sopenharmony_ci#define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */ 6862306a36Sopenharmony_ci#define SH_DMAC_BASE0 0xFC808020 6962306a36Sopenharmony_ci#define SH_DMAC_BASE1 0xFCC08020 7062306a36Sopenharmony_ci#endif 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ 73