162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * sh7724 MMCIF loader
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Copyright (C) 2010 Magnus Damm
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public
762306a36Sopenharmony_ci * License.  See the file "COPYING" in the main directory of this archive
862306a36Sopenharmony_ci * for more details.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include <linux/platform_data/sh_mmcif.h>
1262306a36Sopenharmony_ci#include <mach/romimage.h>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#define MMCIF_BASE      (void __iomem *)0xa4ca0000
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#define MSTPCR2		0xa4150038
1762306a36Sopenharmony_ci#define PTWCR		0xa4050146
1862306a36Sopenharmony_ci#define PTXCR		0xa4050148
1962306a36Sopenharmony_ci#define PSELA		0xa405014e
2062306a36Sopenharmony_ci#define PSELE		0xa4050156
2162306a36Sopenharmony_ci#define HIZCRC		0xa405015c
2262306a36Sopenharmony_ci#define DRVCRA		0xa405018a
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_cienum {
2562306a36Sopenharmony_ci	MMCIF_PROGRESS_ENTER,
2662306a36Sopenharmony_ci	MMCIF_PROGRESS_INIT,
2762306a36Sopenharmony_ci	MMCIF_PROGRESS_LOAD,
2862306a36Sopenharmony_ci	MMCIF_PROGRESS_DONE
2962306a36Sopenharmony_ci};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci/* SH7724 specific MMCIF loader
3262306a36Sopenharmony_ci *
3362306a36Sopenharmony_ci * loads the romImage from an MMC card starting from block 512
3462306a36Sopenharmony_ci * use the following line to write the romImage to an MMC card
3562306a36Sopenharmony_ci * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
3662306a36Sopenharmony_ci */
3762306a36Sopenharmony_ciasmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
3862306a36Sopenharmony_ci{
3962306a36Sopenharmony_ci	mmcif_update_progress(MMCIF_PROGRESS_ENTER);
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci	/* enable clock to the MMCIF hardware block */
4262306a36Sopenharmony_ci	__raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	/* setup pins D7-D0 */
4562306a36Sopenharmony_ci	__raw_writew(0x0000, PTWCR);
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci	/* setup pins MMC_CLK, MMC_CMD */
4862306a36Sopenharmony_ci	__raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci	/* select D3-D0 pin function */
5162306a36Sopenharmony_ci	__raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci	/* select D7-D4 pin function */
5462306a36Sopenharmony_ci	__raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci	/* disable Hi-Z for the MMC pins */
5762306a36Sopenharmony_ci	__raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci	/* high drive capability for MMC pins */
6062306a36Sopenharmony_ci	__raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci	mmcif_update_progress(MMCIF_PROGRESS_INIT);
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci	/* setup MMCIF hardware */
6562306a36Sopenharmony_ci	sh_mmcif_boot_init(MMCIF_BASE);
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci	mmcif_update_progress(MMCIF_PROGRESS_LOAD);
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci	/* load kernel via MMCIF interface */
7062306a36Sopenharmony_ci	sh_mmcif_boot_do_read(MMCIF_BASE, 512,
7162306a36Sopenharmony_ci	                      (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
7262306a36Sopenharmony_ci			      buf);
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci	/* disable clock to the MMCIF hardware block */
7562306a36Sopenharmony_ci	__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci	mmcif_update_progress(MMCIF_PROGRESS_DONE);
7862306a36Sopenharmony_ci}
79